From WikiChip
Editing amd/epyc/9454
Warning: You are not logged in. Your IP address will be publicly visible if you make any edits. If you log in or create an account, your edits will be attributed to your username, along with other benefits.
This page supports semantic in-text annotations (e.g. "[[Is specified as::World Heritage Site]]") to build structured and queryable content provided by Semantic MediaWiki. For a comprehensive description on how to use annotations or the #ask parser function, please have a look at the getting started, in-text annotation, or inline queries help pages.
Facts about "EPYC 9454 - AMD"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | EPYC 9454 - AMD#pcie + |
base frequency | 2,750 MHz (2.75 GHz, 2,750,000 kHz) + |
clock multiplier | 27.5 + |
core count | 48 + |
core family | 25 + |
core model | 17 + |
core name | Genoa + |
core stepping | B1 + |
cpuid | 0x00A10F11 + |
designer | AMD + |
die count | 9 + |
family | EPYC + |
first launched | November 10, 2022 + |
full page name | amd/epyc/9454 + |
has advanced vector extensions | true + |
has advanced vector extensions 2 | true + |
has advanced vector extensions 512 | true + |
has amd amd-v technology | true + |
has amd amd-vi technology | true + |
has amd secure encrypted virtualization technology | true + |
has amd secure memory encryption technology | true + |
has amd sensemi technology | true + |
has amd transparent secure memory encryption technology | true + |
has ecc memory support | true + |
has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Vector Extensions 512 +, Advanced Encryption Standard Instruction Set Extension + and SenseMI Technology + |
has locked clock multiplier | true + |
has simultaneous multithreading | true + |
has x86 advanced encryption standard instruction set extension | true + |
instance of | microprocessor + |
is multi-chip package | true + |
isa | x86-64 + |
isa family | x86 + |
l1$ size | 3,072 KiB (3,145,728 B, 3 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 1,536 KiB (1,572,864 B, 1.5 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 1,536 KiB (1,572,864 B, 1.5 MiB) + |
l2$ description | 8-way set associative + |
l2$ size | 48 MiB (49,152 KiB, 50,331,648 B, 0.0469 GiB) + |
l3$ description | 16-way set associative + |
l3$ size | 256 MiB (262,144 KiB, 268,435,456 B, 0.25 GiB) + |
ldate | November 10, 2022 + |
manufacturer | TSMC + |
market segment | Server + |
max cpu count | 2 + |
max memory | 6,291,456 MiB (6,442,450,944 KiB, 6,597,069,766,656 B, 6,144 GiB, 6 TiB) + |
max memory bandwidth | 429.153 GiB/s (439,453.125 MiB/s, 460.8 GB/s, 460,800 MB/s, 0.419 TiB/s, 0.461 TB/s) + |
max memory channels | 12 + |
max sata ports | 32 + |
max usb ports | 4 + |
microarchitecture | Zen 4 + |
model number | 9454 + |
name | EPYC 9454 + |
package | SP5 + |
part number | 100-100000478 + and 100-100000478WOF + |
process | 5 nm (0.005 μm, 5.0e-6 mm) + and 6 nm (0.006 μm, 6.0e-6 mm) + |
release price | $ 5,225.00 (€ 4,702.50, £ 4,232.25, ¥ 539,899.25) + |
release price (tray) | $ 5,225.00 (€ 4,702.50, £ 4,232.25, ¥ 539,899.25) + |
series | 9004 + |
smp max ways | 2 + |
socket | Socket SP5 + |
supported memory type | DDR5-4800 + |
tdp | 290 W (290,000 mW, 0.389 hp, 0.29 kW) + |
tdp down | 240 W (240,000 mW, 0.322 hp, 0.24 kW) + |
tdp up | 300 W (300,000 mW, 0.402 hp, 0.3 kW) + |
technology | CMOS + |
thread count | 96 + |
turbo frequency | 3,650 MHz (3.65 GHz, 3,650,000 kHz) + |
turbo frequency (1 core) | 3,800 MHz (3.8 GHz, 3,800,000 kHz) + |
word size | 64 bit (8 octets, 16 nibbles) + |