Semiconductor & Computer Engineering
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Difference between revisions of "amd/am486/am486dx4-120sv8b"
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{{amd title|Am486DX4-120SV8B}} | {{amd title|Am486DX4-120SV8B}} | ||
| − | {{ | + | {{chip |
| name = Am486DX4-120SV8B | | name = Am486DX4-120SV8B | ||
| − | | no image = | + | | no image = |
| − | | image = | + | | image = AMD Am486DX4-120.jpg |
| image size = | | image size = | ||
| − | | caption = | + | | caption = A80486DX4-120SV8B |
| designer = AMD | | designer = AMD | ||
| manufacturer = AMD | | manufacturer = AMD | ||
| model number = Am486DX4-120SV8B | | model number = Am486DX4-120SV8B | ||
| part number = A80486DX4-120SV8B | | part number = A80486DX4-120SV8B | ||
| − | |||
| part number 2 = | | part number 2 = | ||
| part number 3 = | | part number 3 = | ||
| + | | part number 4 = | ||
| market = | | market = | ||
| first announced = 1995 | | first announced = 1995 | ||
| Line 25: | Line 25: | ||
| bus type = FSB | | bus type = FSB | ||
| bus speed = 40 MHz | | bus speed = 40 MHz | ||
| − | | bus rate = | + | | bus rate = 40 MT/s |
| clock multiplier = 3 | | clock multiplier = 3 | ||
| cpuid = | | cpuid = | ||
| Line 45: | Line 45: | ||
| thread count = | | thread count = | ||
| max cpus = 1 | | max cpus = 1 | ||
| − | | max memory = 4 | + | | max memory = 4 GiB |
| max memory addr = | | max memory addr = | ||
| − | + | ||
| power = | | power = | ||
| v core = 3.3 V | | v core = 3.3 V | ||
| Line 81: | Line 81: | ||
{{main|intel/microarchitectures/80486#Memory_Hierarchy|l1=80486 § Cache}} | {{main|intel/microarchitectures/80486#Memory_Hierarchy|l1=80486 § Cache}} | ||
{{cache info | {{cache info | ||
| − | |l1 cache=8 | + | |l1 cache=8 KiB |
| − | |l1 break=1x8 | + | |l1 break=1x8 KiB |
|l1 desc=4-way set associative | |l1 desc=4-way set associative | ||
|l1 extra=(unified, write-back policy) | |l1 extra=(unified, write-back policy) | ||
| Line 93: | Line 93: | ||
* Stop-clock control | * Stop-clock control | ||
* [[has feature::System Management Mode]] (SMM) | * [[has feature::System Management Mode]] (SMM) | ||
| + | |||
| + | == Die Shot == | ||
| + | [[File:AMD 80486DX4 die.JPG|400px]] | ||
== Documents == | == Documents == | ||
Latest revision as of 15:19, 13 December 2017
| Edit Values | |
| Am486DX4-120SV8B | |
 | |
| A80486DX4-120SV8B | |
| General Info | |
| Designer | AMD |
| Manufacturer | AMD |
| Model Number | Am486DX4-120SV8B |
| Part Number | A80486DX4-120SV8B |
| Introduction | 1995 (announced) March, 1996 (launched) |
| Shop | Amazon |
| General Specs | |
| Family | Am486 |
| Series | Am486DX4S |
| Frequency | 120 MHz |
| Bus type | FSB |
| Bus speed | 40 MHz |
| Bus rate | 40 MT/s |
| Clock multiplier | 3 |
| Microarchitecture | |
| Microarchitecture | 80486 |
| Core Name | Am486DX4S |
| Process | 500 nm |
| Technology | CMOS |
| Word Size | 32 bit |
| Cores | 1 |
| Max Memory | 4 GiB |
| Multiprocessing | |
| Max SMP | 1-Way (Uniprocessor) |
| Electrical | |
| Vcore | 3.3 V ± 0.3 V |
| OP Temperature | 0 °C – 85 °C |
Am486DX4-100SV8B was an Enhanced Am486 microprocessor introduced by AMD in 1996. This processor had a clock multiplier of 3 having a frequency of 120 MHz with a bus frequency of 40 MHz. This "Enhanced" Am486 includes some other features such as SMM, stop-clock control, and write-back cache.
Cache[edit]
- Main article: 80486 § Cache
| Cache Info [Edit Values] | ||
| L1$ | 8 KiB 8,192 B 0.00781 MiB |
1x8 KiB 4-way set associative (unified, write-back policy) |
Graphics[edit]
This chip had no integrated graphics processing unit.
Features[edit]
- Stop-clock control
- System Management Mode (SMM)
Die Shot[edit]
Documents[edit]
See also[edit]
Facts about "Am486DX4-120SV8B - AMD"
| has feature | System Management Mode + |
| l1$ description | 4-way set associative + |
