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{{ambric title|Am2035}}
 
{{ambric title|Am2035}}
{{chip
+
{{mpu
 
| name                = Am2035
 
| name                = Am2035
 
| no image            = Yes
 
| no image            = Yes
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| designer            = Ambric
 
| designer            = Ambric
 
| manufacturer        =  
 
| manufacturer        =  
| model number        = Am2035
+
| model number        =  
 
| part number        = Am2035
 
| part number        = Am2035
 
| market              = Embedded
 
| market              = Embedded
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| frequency          = 333 MHz
 
| frequency          = 333 MHz
 
| bus type            =  
 
| bus type            =  
| bus speed          = 100 MHz
+
| bus speed          =  
 
| bus rate            =  
 
| bus rate            =  
| clock multiplier    = 3.3
+
| clock multiplier    =  
  
 
| microarch          = Ambric  
 
| microarch          = Ambric  
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| thread count        =  
 
| thread count        =  
 
| max cpus            =  
 
| max cpus            =  
| max memory          = 4 GiB
+
| max memory          =  
  
 
| electrical          =  
 
| electrical          =  
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| socket 0 type      =  
 
| socket 0 type      =  
 
}}
 
}}
'''Am2035''' was an [[MPPA]] introduced in late 2006 by [[Ambric]]. This model was made of {{ambric|am2000#Architecture|35 Brics}} arranged as a grid, making up a total of 280 {{arch|32}} [[RICS]]-like cores operating asynchronously at 1-333 MHz.
 
 
== Architecture ==
 
{{main|ambric/am2000#Architecture|l1=Am2000 § Architecture}}
 
The Am2035 is made of 35 homogeneous 'Brics' laid out in a grid to form 280 cores and 280 RAM units.
 
 
General layout:
 
* 35x Brics
 
** 2x Computer Unit (CU)
 
*** 2x SRD {{arch|32}} CPU
 
*** 2x RD {{arch|32}} CPU
 
** 2x [[RAM]] Unit (RU)
 
*** 4x 2 KB [[SRAM]] bank
 
 
== Cache ==
 
The Am2035 contains 35 Brics, each with its own [[RAM]] Unit (RU) of 13 kB of SRAM for a total of 455 kB of SRAM.
 
 
== Memory controller ==
 
{{integrated memory controller
 
| type              = DDR2-400
 
| controllers        = 2
 
| channels          = 1
 
| ecc support        =
 
| max bandwidth      =
 
| bandwidth schan    =
 
| bandwidth dchan    =
 
| max memory        = 4 GiB
 
}}
 
 
== Expansions ==
 
* [[has feature::PCIe]]
 
* [[has feature::JTAG]]
 
* [[has feature::GPIO]] @ 100 MHz
 
* [[has feature::serial flash]]
 

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Facts about "Am2035 - Ambric"
base frequency333 MHz (0.333 GHz, 333,000 kHz) +
bus speed100 MHz (0.1 GHz, 100,000 kHz) +
clock multiplier3.3 +
core count280 +
designerAmbric +
familyAm2000 +
first announcedOctober 10, 2006 +
first launchedJanuary 2007 +
full page nameambric/am2000/am2035 +
has featurePCIe +, JTAG +, GPIO + and serial flash +
has locked clock multiplierfalse +
instance ofmicroprocessor +
last order2012 +
last shipment2012 +
ldateJanuary 2007 +
market segmentEmbedded +
max memory4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) +
microarchitectureAmbric +
model numberAm2035 +
nameAm2035 +
part numberAm2035 +
process130 nm (0.13 μm, 1.3e-4 mm) +
seriesGen 1 +
technologyCMOS +
word size32 bit (4 octets, 8 nibbles) +