Semiconductor & Computer Engineering
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Difference between revisions of "Template:x86 features"
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<tr style="vertical-align:top;"><td> | <tr style="vertical-align:top;"><td> | ||
<table class="tl1" style="font-size: 0.9em; float: left;"><!-- | <table class="tl1" style="font-size: 0.9em; float: left;"><!-- | ||
| − | -->{{#if: {{istrue|{{{mmx| | + | -->{{#if: {{istrue|{{{mmx|}}}}} | <tr><th style="width: 70px;">MMX</th><td>MMX Extension</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{emmx| | + | -->{{#if: {{istrue|{{{emmx|}}}}} | <tr><th style="width: 70px;">EMMX</th><td>Extended MMX Extension</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{3dnow| | + | -->{{#if: {{istrue|{{{3dnow|}}}}} | <tr><th style="width: 70px;">3DNow!</th><td>3DNow! Extension</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{e3dnow| | + | -->{{#if: {{istrue|{{{e3dnow|}}}}} | <tr><th style="width: 70px;">E3DNow!</th><td>Extended 3DNow! Extension</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{sse| | + | -->{{#if: {{istrue|{{{sse|}}}}} | <tr><th style="width: 70px;">SSE</th><td>Streaming SIMD Extensions</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{sse2| | + | -->{{#if: {{istrue|{{{sse2|}}}}} | <tr><th style="width: 70px;">SSE2</th><td>Streaming SIMD Extensions 2</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{sse3| | + | -->{{#if: {{istrue|{{{sse3|}}}}} | <tr><th style="width: 70px;">SSE3</th><td>Streaming SIMD Extensions 3</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{ssse3| | + | -->{{#if: {{istrue|{{{ssse3|}}}}} | <tr><th style="width: 70px;">SSSE3</th><td>Supplemental SSE3</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{sse41| | + | -->{{#if: {{istrue|{{{sse41|}}}}} | <tr><th style="width: 70px;">SSE4.1</th><td>Streaming SIMD Extensions 4.1</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{sse42| | + | -->{{#if: {{istrue|{{{sse42|}}}}} | <tr><th style="width: 70px;">SSE4.2</th><td>Streaming SIMD Extensions 4.2</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{sse4a| | + | -->{{#if: {{istrue|{{{sse4a|}}}}} | <tr><th style="width: 70px;">SSE4a</th><td>Streaming SIMD Extensions A</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{avx| | + | -->{{#if: {{istrue|{{{avx|}}}}} | <tr><th style="width: 70px;">AVX</th><td>Advanced Vector Extensions</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{avx2| | + | -->{{#if: {{istrue|{{{avx2|}}}}} | <tr><th style="width: 70px;">AVX2</th><td>Advanced Vector Extensions 2</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{avx512| | + | -->{{#if: {{istrue|{{{avx512|}}}}} | <tr><th style="width: 70px;">AVX-512</th><td>Advanced Vector 512-bit</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{abm| | + | -->{{#if: {{istrue|{{{abm|}}}}} | <tr><th style="width: 70px;">ABM</th><td>Advanced Bit Manipulation</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{tbm| | + | -->{{#if: {{istrue|{{{tbm|}}}}} | <tr><th style="width: 70px;">TBM</th><td>Trailing Bit Manipulation</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{bmi1| | + | -->{{#if: {{istrue|{{{bmi1|}}}}} | <tr><th style="width: 70px;">BMI1</th><td>Bit Manipulation Instruction Set 1</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{bmi2| | + | -->{{#if: {{istrue|{{{bmi2|}}}}} | <tr><th style="width: 70px;">BMI2</th><td>Bit Manipulation Instruction Set 2</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{fma3| | + | -->{{#if: {{istrue|{{{fma3|}}}}} | <tr><th style="width: 70px;">FMA3</th><td>3-Operand Fused-Multiply-Add</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{fma4| | + | -->{{#if: {{istrue|{{{fma4|}}}}} | <tr><th style="width: 70px;">FMA4</th><td>4-Operand Fused-Multiply-Add</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{aes| | + | -->{{#if: {{istrue|{{{aes|}}}}} | <tr><th style="width: 70px;">AES</th><td>AES Encryption Instructions</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{rdrand| | + | -->{{#if: {{istrue|{{{rdrand|}}}}} | <tr><th style="width: 70px;">RdRand</th><td>Hardware RNG</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{sha| | + | -->{{#if: {{istrue|{{{sha|}}}}} | <tr><th style="width: 70px;">SHA</th><td>SHA Extensions</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{xop| | + | -->{{#if: {{istrue|{{{xop|}}}}} | <tr><th style="width: 70px;">XOP</th><td>eXtended Operations Extension</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{adx| | + | -->{{#if: {{istrue|{{{adx|}}}}} | <tr><th style="width: 70px;">ADX</th><td>Multi-Precision Add-Carry</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{clmul| | + | -->{{#if: {{istrue|{{{clmul|}}}}} | <tr><th style="width: 70px;">CLMUL</th><td>Carry-less Multiplication Extension</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{f16c| | + | -->{{#if: {{istrue|{{{f16c|}}}}} | <tr><th style="width: 70px;">F16C</th><td>16-bit Floating Point Conversion</td></tr> }}<!-- |
--></table> | --></table> | ||
<table class="tl1"><!-- | <table class="tl1"><!-- | ||
| − | -->{{#if: {{istrue|{{{x8616| | + | -->{{#if: {{istrue|{{{x8616|}}}}} | <tr><th style="width: 100px;">x86-16</th><td>16-bit x86</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{x8632| | + | -->{{#if: {{istrue|{{{x8632|}}}}} | <tr><th style="width: 100px;">x86-32</th><td>32-bit x86</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{x8664| | + | -->{{#if: {{istrue|{{{x8664|}}}}} | <tr><th style="width: 100px;">x86-64</th><td>64-bit x86</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{real| | + | -->{{#if: {{istrue|{{{real|}}}}} | <tr><th style="width: 100px;">Real</th><td>Real Mode</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{protected| | + | -->{{#if: {{istrue|{{{protected|}}}}} | <tr><th style="width: 100px;">Protected</th><td>Protected Mode</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{smm| | + | -->{{#if: {{istrue|{{{smm|}}}}} | <tr><th style="width: 100px;">SMM</th><td>System Management Mode</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{fpu| | + | -->{{#if: {{istrue|{{{fpu|}}}}} | <tr><th style="width: 100px;">FPU</th><td>Integrated x87 FPU</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{powernow| | + | -->{{#if: {{istrue|{{{powernow|}}}}} | <tr><th style="width: 100px;">PowerNow!</th><td>PowerNow[[has feature::PowerNow!| ]]</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{nx| | + | -->{{#if: {{istrue|{{{nx|}}}}} | <tr><th style="width: 100px;">NX</th><td>No-eXecute</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{hp| | + | -->{{#if: {{istrue|{{{hp|}}}}} | <tr><th style="width: 100px;">HP</th><td>Hyper-Threading[[has simultaneous multithreading::true| ]][[has feature::Hyper-Threading Technology| ]]</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{tbt1| | + | -->{{#if: {{istrue|{{{tbt1|}}}}} | <tr><th style="width: 100px;">TBT 1.0</th><td>{{intel|Turbo Boost Technology}} 1.0 [[has feature::Turbo Boost Technology 1.0| ]][[has intel turbo boost technology 1.0::true| ]]</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{tbt2| | + | -->{{#if: {{istrue|{{{tbt2|}}}}} | <tr><th style="width: 100px;">TBT 2.0</th><td>{{intel|Turbo Boost Technology}} 2.0[[has feature::Turbo Boost Technology 2.0| ]][[has intel turbo boost technology 2.0::true| ]]</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{tbmt3| | + | -->{{#if: {{istrue|{{{tbmt3|}}}}} | <tr><th style="width: 100px;">TBMT 3.0</th><td>Turbo Boost Max Technology 3.0[[has feature::Turbo Boost Max Technology 3.0| ]][[has intel turbo boost max technology 3.0::true| ]]</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{bpt| | + | -->{{#if: {{istrue|{{{bpt|}}}}} | <tr><th style="width: 100px;">BPT</th><td>Burst Performance Technology</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{eist| | + | -->{{#if: {{istrue|{{{eist|}}}}} | <tr><th style="width: 100px;">EIST</th><td>Enhanced SpeedStep Technology</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{txt| | + | -->{{#if: {{istrue|{{{txt|}}}}} | <tr><th style="width: 100px;">TXT</th><td>Trusted Execution Technology (SMX)[[has feature::Trusted Execution Technology| ]][[has intel trusted execution technology::true| ]]</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{vpro| | + | -->{{#if: {{istrue|{{{vpro|}}}}} | <tr><th style="width: 100px;">vPro</th><td>Intel vPro[[has intel vpro technology::true| ]][[has feature::Intel vPro Technology| ]]</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{vtx| | + | -->{{#if: {{istrue|{{{vtx|}}}}} | <tr><th style="width: 100px;">VT-x</th><td>VT-x (Virtualization)</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{vtd| | + | -->{{#if: {{istrue|{{{vtd|}}}}} | <tr><th style="width: 100px;">VT-d</th><td>VT-d (I/O MMU virtualization)</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{amdvi| | + | -->{{#if: {{istrue|{{{amdvi|}}}}} | <tr><th style="width: 100px;">AMD-Vi</th><td>AMD-Vi (I/O MMU virtualization)</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{amdv| | + | -->{{#if: {{istrue|{{{amdv|}}}}} | <tr><th style="width: 100px;">AMD-V</th><td>AMD virtualization</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{ept| | + | -->{{#if: {{istrue|{{{ept|}}}}} | <tr><th style="width: 100px;">EPT</th><td>Extended Page Tables ([[Second Level Address Translation|SLAT]])</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{rvi| | + | -->{{#if: {{istrue|{{{rvi|}}}}} | <tr><th style="width: 100px;">RVI</th><td>Rapid Virtualization Indexing ([[Second Level Address Translation|SLAT]])</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{tsx| | + | -->{{#if: {{istrue|{{{tsx|}}}}} | <tr><th style="width: 100px;">TSX</th><td>Transactional Synchronization Extensions[[has feature::Transactional Synchronization Extensions| ]][[has transactional synchronization extensions::true| ]]</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{mpx| | + | -->{{#if: {{istrue|{{{mpx|}}}}} | <tr><th style="width: 100px;">MPX</th><td>Memory Protection Extensions</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{sgx| | + | -->{{#if: {{istrue|{{{sgx|}}}}} | <tr><th style="width: 100px;">SGX</th><td>Software Guard Extensions</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{securekey| | + | -->{{#if: {{istrue|{{{securekey|}}}}} | <tr><th style="width: 100px;">Secure Key</th><td>Secure Key Technology</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{osguard| | + | -->{{#if: {{istrue|{{{osguard|}}}}} | <tr><th style="width: 100px;">OS Guard</th><td>OS Guard Technology</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{flex| | + | -->{{#if: {{istrue|{{{flex|}}}}} | <tr><th style="width: 100px;">Flex Memory</th><td>Flex Memory Access</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{isrt| | + | -->{{#if: {{istrue|{{{isrt|}}}}} | <tr><th style="width: 100px;">ISRT</th><td>Smart Response Technolog</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{mwt| | + | -->{{#if: {{istrue|{{{mwt|}}}}} | <tr><th style="width: 100px;">MWT</th><td>My WiFi Technology</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{sipp| | + | -->{{#if: {{istrue|{{{sipp|}}}}} | <tr><th style="width: 100px;">SIPP</th><td>Stable Image Platform Program</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{att| | + | -->{{#if: {{istrue|{{{att|}}}}} | <tr><th style="width: 100px;">ATT</th><td>Anti-Theft Technology</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{ipt| | + | -->{{#if: {{istrue|{{{ipt|}}}}} | <tr><th style="width: 100px;">IPT</th><td>Identity Protection Technology</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{smartmp| | + | -->{{#if: {{istrue|{{{smartmp|}}}}} | <tr><th style="width: 100px;">SmartMP</th><td>SmartMP Technology[[has feature::SmartMP Technology| ]][[has amd smartmp technology::true| ]][[has multiprocessing support::true| ]]</td></tr> }}<!-- |
--></table> | --></table> | ||
</td> | </td> | ||
Revision as of 15:40, 26 November 2016
[Edit/Modify Supported Features]
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Supported x86 Extensions & Processor Features
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