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Difference between revisions of "Template:main/chips"
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{{main/i2|90px|0.8em|amd/athlon x4|Athlon X4}}
 
{{main/i2|90px|0.8em|amd/athlon x4|Athlon X4}}
 
{{main/i2|90px|0.8em|amd/athlon xp|Athlon XP}}
 
{{main/i2|90px|0.8em|amd/athlon xp|Athlon XP}}
 +
{{main/i2|90px|0.8em|amd/duron|Duron}}
 
{{main/i2|90px|0.8em|amd/k5|K5}}
 
{{main/i2|90px|0.8em|amd/k5|K5}}
 
{{main/i2|90px|0.8em|amd/k6|K6}}
 
{{main/i2|90px|0.8em|amd/k6|K6}}
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{{main/i2|90px|0.8em|amd/phenom|Phenom}}
 
{{main/i2|90px|0.8em|amd/phenom|Phenom}}
 
{{main/i2|90px|0.8em|amd/phenom ii|Phenom II}}
 
{{main/i2|90px|0.8em|amd/phenom ii|Phenom II}}
 +
{{main/i2|90px|0.8em|amd/sempron|Sempron}}
 
{{main/i2|90px|0.8em|amd/turion 64|Turion 64}}
 
{{main/i2|90px|0.8em|amd/turion 64|Turion 64}}
 
{{main/i2|90px|0.8em|amd/turion 64 x2|Turion 64 X2}}
 
{{main/i2|90px|0.8em|amd/turion 64 x2|Turion 64 X2}}
 +
{{main/i2|90px|1em|arm|'''ARM'''}}
 +
{{main/i2|90px|0.8em|arm/arm2|ARM2}}
 +
{{main/i2|90px|0.8em|arm/arm3|ARM3}}
 +
{{main/i2|90px|0.8em|arm/arm6|ARM6}}
 +
{{main/i2|90px|0.8em|arm/arm7|ARM7}}
 +
{{main/i2|90px|0.8em|arm/arm8|ARM8}}
 +
{{main/i2|90px|0.8em|arm/arm9|ARM9}}
 +
{{main/i2|90px|0.8em|arm/arm10|ARM10}}
 +
{{main/i2|90px|0.8em|arm/arm11|ARM11}}
 +
{{main/i2|90px|0.8em|arm/cortex-m0|Cortex-M0}}
 +
{{main/i2|90px|0.8em|arm/cortex-R4|Cortex-R4}}
 +
{{main/i2|90px|0.8em|arm/cortex-a7|Cortex-A7}}
 
{{main/i2|90px|1em|atmel|'''Atmel'''}}
 
{{main/i2|90px|1em|atmel|'''Atmel'''}}
 
{{main/i2|90px|0.8em|atmel/avr|AVR}}
 
{{main/i2|90px|0.8em|atmel/avr|AVR}}
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{{main/i2|90px|0.8em|dec/alpha 21364|Alpha 21364}}
 
{{main/i2|90px|0.8em|dec/alpha 21364|Alpha 21364}}
 
{{main/i2|90px|0.8em|dec/strongarm|StrongARM}}
 
{{main/i2|90px|0.8em|dec/strongarm|StrongARM}}
 +
{{main/i2|90px|1em|fairchild|'''Fairchild'''}}
 +
{{main/i2|90px|0.8em|fairchild/clipper|CLIPPER}}
 
{{main/i2|90px|1em|fujitsu|'''Fujitsu'''}}
 
{{main/i2|90px|1em|fujitsu|'''Fujitsu'''}}
 
{{main/i2|90px|0.8em|fujitsu/microsparc ii|microSPARC II}}
 
{{main/i2|90px|0.8em|fujitsu/microsparc ii|microSPARC II}}
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{{main/i2|90px|0.8em|intel/xeon|Xeon}}
 
{{main/i2|90px|0.8em|intel/xeon|Xeon}}
 
{{main/i2|90px|0.8em|intel/xeon d|Xeon D}}
 
{{main/i2|90px|0.8em|intel/xeon d|Xeon D}}
 +
{{main/i2|90px|0.8em|intel/xeon e3|Xeon E3}}
 +
{{main/i2|90px|0.8em|intel/xeon e5|Xeon E5}}
 +
{{main/i2|90px|0.8em|intel/xeon e7|Xeon E7}}
 
{{main/i2|90px|0.8em|intel/xeon phi|Xeon Phi}}
 
{{main/i2|90px|0.8em|intel/xeon phi|Xeon Phi}}
 
{{main/i2|90px|0.8em|mips|'''MIPS'''}}
 
{{main/i2|90px|0.8em|mips|'''MIPS'''}}
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{{main/i2|90px|1em|rca/epic|EPIC}}
 
{{main/i2|90px|1em|rca/epic|EPIC}}
 
{{main/i2|90px|1em|rca/1802|1802}}
 
{{main/i2|90px|1em|rca/1802|1802}}
 +
{{main/i2|90px|1em|ross|'''Ross'''}}
 +
{{main/i2|90px|1em|ross/hypersparc|HyperSPARC}}
 
{{main/i2|90px|1em|sgi|'''SGI'''}}
 
{{main/i2|90px|1em|sgi|'''SGI'''}}
 
{{main/i2|90px|0.8em|sgi/r12000|R12000}}
 
{{main/i2|90px|0.8em|sgi/r12000|R12000}}
Line 226: Line 247:
 
{{main/i2|90px|0.8em|sun/ultrasparc t1|UltraSPARC T1}}
 
{{main/i2|90px|0.8em|sun/ultrasparc t1|UltraSPARC T1}}
 
{{main/i2|90px|0.8em|sun/ultrasparc t2|UltraSPARC T2}}
 
{{main/i2|90px|0.8em|sun/ultrasparc t2|UltraSPARC T2}}
{{main/i2|90px|1em|wdc|'''WDC'''}}
+
{{main/i2|90px|1em|western design center|'''WDC'''}}
{{main/i2|90px|0.8em|wdc/wdc 65c02|WDC 65C02}}
+
{{main/i2|90px|0.8em|western design center/wdc 65c02|WDC 65C02}}
{{main/i2|90px|0.8em|wdc/wdc 65816|WDC 65816}}
+
{{main/i2|90px|0.8em|western design center/wdc 65816|WDC 65816}}
 
{{main/i2|90px|1em|zilog|'''Zilog'''}}
 
{{main/i2|90px|1em|zilog|'''Zilog'''}}
 
{{main/i2|90px|0.8em|zilog/z80|Z80}}
 
{{main/i2|90px|0.8em|zilog/z80|Z80}}

Latest revision as of 19:17, 11 December 2016