Semiconductor & Computer Engineering
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Difference between revisions of "Template:intel proc tech"
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-->{{#if: {{{archs|}}}|[[intel/microarchitectures/{{lc:{{{archs}}}}}|{{{archs}}}]]}} }}<!-- | -->{{#if: {{{archs|}}}|[[intel/microarchitectures/{{lc:{{{archs}}}}}|{{{archs}}}]]}} }}<!-- | ||
-->{{#if: {{#explode: {{{archs|}}}|,|2}}|,<br>[[intel/microarchitectures/{{lc:{{#explode: {{{archs|}}}|,|2}}}}|{{#explode: {{{archs|}}}|,|2}}]]}}<!-- | -->{{#if: {{#explode: {{{archs|}}}|,|2}}|,<br>[[intel/microarchitectures/{{lc:{{#explode: {{{archs|}}}|,|2}}}}|{{#explode: {{{archs|}}}|,|2}}]]}}<!-- | ||
| − | -->{{#if: {{#explode: {{{archs|}}}|,| | + | -->{{#if: {{#explode: {{{archs|}}}|,|3}}|,<br>[[intel/microarchitectures/{{lc:{{#explode: {{{archs|}}}|,|3}}}}|{{#explode: {{{archs|}}}|,|3}}]]}}<!-- |
| − | -->{{#if: {{#explode: {{{archs|}}}|,| | + | -->{{#if: {{#explode: {{{archs|}}}|,|4}}|,<br>[[intel/microarchitectures/{{lc:{{#explode: {{{archs|}}}|,|4}}}}|{{#explode: {{{archs|}}}|,|4}}]]}}<!-- |
| − | -->{{#if: {{#explode: {{{archs|}}}|,| | + | -->{{#if: {{#explode: {{{archs|}}}|,|5}}|,<br>[[intel/microarchitectures/{{lc:{{#explode: {{{archs|}}}|,|5}}}}|{{#explode: {{{archs|}}}|,|5}}]]}}<!-- |
--></td> | --></td> | ||
<td rowspan="{{#if:{{{a6|}}}|6|{{#if:{{{a5|}}}|5|{{#if:{{{a4|}}}|4|{{#if:{{{a3|}}}|3|{{#if:{{{a2|}}}|2|1}}}}}}}}}}">{{{mlayers}}}</td><!-- | <td rowspan="{{#if:{{{a6|}}}|6|{{#if:{{{a5|}}}|5|{{#if:{{{a4|}}}|4|{{#if:{{{a3|}}}|3|{{#if:{{{a2|}}}|2|1}}}}}}}}}}">{{{mlayers}}}</td><!-- | ||
Revision as of 02:29, 11 May 2017
<tr> <td rowspan="1">{{{year}}}</td> <td rowspan="1">{{{name}}}</td> <td rowspan="1">[[{{{node}}}]]</td> <td rowspan="1"></td> <td rowspan="1">{{{mlayers}}}</td> </tr>
