• 32-bit architecture
  ...or 4 [[octet]]s. These architectures typically have a matching [[register file]] with [[registers]] width of 32 bits.
  1 KB (137 words) - 19:55, 5 December 2019
• 64-bit architecture
  ...or 8 [[octet]]s. These architectures typically have a matching [[register file]] with [[registers]] width of 64 bits.
  2 KB (240 words) - 02:48, 17 March 2019
• 15-bit architecture
  ...width of 15 bits. These architectures typically have a matching [[register file]] with [[registers]] width of 15 bits.
  372 bytes (47 words) - 00:26, 17 January 2016
• 18-bit architecture
  ...width of 18 bits. These architectures typically have a matching [[register file]] with [[registers]] width of 18 bits.
  419 bytes (53 words) - 00:50, 17 January 2016
• nec/μcom-42/μpd548
  ...ily}}. This microcontroler was designed specifically for [[electronic cash register]]s, [[point of sale]]s, and electronic scales. * [[:File:NEC μPD548.pdf|NEC μPD548 datasheet]]
  2 KB (183 words) - 05:49, 20 January 2016
• motorola/mc14500/mc14500b
  The MC14500B had a single 1-bit register to hold the result and supported {{motorola|mc14500/isa|16 different operat * [[:File:MC14500B datasheet.pdf|MC14500B Datasheet]]
  2 KB (232 words) - 16:31, 13 December 2017
• motorola/mc14500
  The MC14500B has a single register (the result register) and supports 16 different operations. * [[:File:Motorola MC14500B Industial Control Unit Handbook.pdf|Motorola MC14500B Ind
  4 KB (538 words) - 10:44, 22 May 2018
• 36-bit architecture
  ...idth of 36 bits . These architectures typically have a matching [[register file]] with [[registers]] width of 36 bits. 36-bit systems allowed for the manip
  578 bytes (67 words) - 07:19, 27 June 2018
• intel/microarchitectures/bonnell
  [[File:intel low-power roadmap (45-32-22).png|500px|right|thumb|[[45 nm]] - [[32 n | [[File:intel centrino atom logo.png|100px]] ||
  38 KB (5,468 words) - 20:29, 23 May 2019
• intel/microarchitectures/saltwell
  :[[File:bonnell pipeline.svg]] *** reading [[register]] operand
  7 KB (872 words) - 19:42, 30 November 2017
• intel/microarchitectures/silvermont
  [[File:silvermont block.png]] [[File:silvermont modules.svg|right|450px]]
  9 KB (1,160 words) - 09:35, 25 September 2019
• intel/microarchitectures/haswell (client)
  [[File:haswell buff window.png|right|350px]] ** Integer register file up 8 entries to 168
  27 KB (3,750 words) - 06:57, 18 November 2023
• intel/microarchitectures/sandy bridge (client)
  [[File:intel gesher.jpg|left|150px]] | rowspan="2" | [[File:intel celeron (2009).png|60px|link=intel/celeron]] || rowspan="2" | {{inte
  84 KB (13,075 words) - 00:54, 29 December 2020
• intel/microarchitectures/skylake (client)
  | rowspan="2" | [[File:intel celeron (2015).png|50px|link=intel/celeron]] || rowspan="2" | {{inte | rowspan="2" | [[File:intel pentium (2015).png|50px|link=intel/pentium_(2009)]] || rowspan="2" |
  79 KB (11,922 words) - 06:46, 11 November 2022
• amd/am386
  ...quiring a separate static RAM chip to store machine state (e.g. [[register file]]) when in maximum saving during sleep mode. In addition to sleep mode, the [[File:ADVANCED MICRO DEVICES Am386 TM DX-40 NG80386DX-40 D 313NFY9 m AMD 5983D 93
  8 KB (1,077 words) - 14:50, 2 April 2020
• intel/80486
  ...f received some attention as well. Simple ALU ''register, register'' and ''register, [[immediate value|immediate]]'' cached operations could now complete in a * [[:File:486 DX2 Microprocessor Data Book (February 1992).pdf|486 DX2 Microprocessor
  8 KB (953 words) - 08:27, 29 October 2022
• 128-bit architecture
  ...or 16 [[octet]]s. These architectures typically have a matching [[register file]] with [[registers]] width of 64 bits.
  593 bytes (81 words) - 09:51, 20 July 2018
• cmu/piperench
  ...idual ''stripes''. Each strip has a set of simple execution units (EU/PE), register files, and a interconnection network. By configuring each of the stripes us [[File:cmu piperench die.jpg|450px]]
  3 KB (337 words) - 16:13, 13 December 2017
• ambric/am2000
  | [[File:Am2045 die shot.png]] || [[File:Am2045 die shot (annotated).png]] [[File:ambric neighbor channels.png|thumb|right|350px|'''Neighbor Channels''']]
  11 KB (1,421 words) - 14:45, 9 December 2018
• mathstar/builder
  [[File:mathstar layout.png|right]] ...c Redundancy Check]] (CRC), [[Multiply Accumulator]] (MAC), and [[Register File]] (RF). The control program guides the overall program execution and the da
  5 KB (596 words) - 21:23, 19 November 2017

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