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<h3>Broader data type support</h3>
+
Broader data type support
<ul>
+
128-bit IEEE 754 Quad-Precision Float – Full width quad-precision for financial and security applications
<li>128-bit IEEE 754 Quad-Precision Float – Full width quad-precision for financial and security applications</li>
+
Expanded BCD and 128b Decimal Integer – For database and native analytics
<li>Expanded BCD and 128b Decimal Integer – For database and native analytics</li>
+
Half-Precision Float Conversion – Optimized for accelerator bandwidth and data exchange
<li>Half-Precision Float Conversion – Optimized for accelerator bandwidth and data exchange</li>
 
</ul>
 
  
<h3>Support Emerging Algorithms</h3>
+
Support Emerging Algorithms
<li>Enhanced Arithmetic and SIMD</li>
+
Enhanced Arithmetic and SIMD
<li>Random Number Generation Instruction</li>
+
Random Number Generation Instruction
</ul>
 
  
<h3>Accelerate Emerging Workloads</h3>
+
Accelerate Emerging Workloads
<ul>
+
Memory Atomics – For high scale data-centric applications
<li>Memory Atomics – For high scale data-centric applications</li>
+
Hardware Assisted Garbage Collection – Optimize response time of interpretive languages
<li>Hardware Assisted Garbage Collection – Optimize response time of interpretive languages</li>
 
</ul>
 
  
<h3>Cloud Optimization</h3>
+
Cloud Optimization
<ul>
+
Enhanced Translation Architecture – Optimized for Linux
<li>Enhanced Translation Architecture – Optimized for Linux</li>
+
New Interrupt Architecture – Automated partition routing for extreme virtualization
<li>New Interrupt Architecture – Automated partition routing for extreme virtualization</li>
+
Enhanced Accelerator Virtualization
<li>Enhanced Accelerator Virtualization</li>
+
Hardware Enforced Trusted Execution
<li>Hardware Enforced Trusted Execution</li>
 
</ul>
 
  
<h3>Energy & Frequency Management</h3>
+
Energy & Frequency Management
<ul>
+
POWER9 Workload Optimized Frequency – Manage energy between threads and cores with reduced wakeup latency
<li>POWER9 Workload Optimized Frequency – Manage energy between threads and cores with reduced wakeup latency</li>
 
</ul>
 
  
 
(Source: https://cdn2.hubspot.net/hubfs/652102/Documents/POWER9-Features-and-Specifications.pdf?t=1497275206540, page 12)
 
(Source: https://cdn2.hubspot.net/hubfs/652102/Documents/POWER9-Features-and-Specifications.pdf?t=1497275206540, page 12)

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