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Editing 350 nm lithography process
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| 18.1 µm² || 0.41x || ? µm² || ?x || ? µm² || ?x || ? µm² || ?x || ? µm² || ?x || ? µm² || ?x || ? µm² || ?x || ? µm² || ?x || ? µm² || ?x || 21.67 µm² || ?x || ? µm² || ?x|| 18 µm² || ?x | | 18.1 µm² || 0.41x || ? µm² || ?x || ? µm² || ?x || ? µm² || ?x || ? µm² || ?x || ? µm² || ?x || ? µm² || ?x || ? µm² || ?x || ? µm² || ?x || 21.67 µm² || ?x || ? µm² || ?x|| 18 µm² || ?x | ||
{{scrolling table/end}} | {{scrolling table/end}} | ||
− | === | + | === Design Rules === |
{| class="wikitable collapsible collapsed" | {| class="wikitable collapsible collapsed" | ||
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| Metal 4 || 1.70 µm || 1.70 µm | | Metal 4 || 1.70 µm || 1.70 µm | ||
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== 350 nm Microprocessors== | == 350 nm Microprocessors== | ||
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** {{intel|80186|l=arch}} (embedded [[IP cores]] only) | ** {{intel|80186|l=arch}} (embedded [[IP cores]] only) | ||
* DEC | * DEC | ||
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** {{decc|StrongARM|l=arch}} | ** {{decc|StrongARM|l=arch}} | ||
{{expand list}} | {{expand list}} | ||
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* Schutz, J., and R. Wallace. "A 450 MHz IA32 P6 family microprocessor." Solid-State Circuits Conference, 1998. Digest of Technical Papers. 1998 IEEE International. IEEE, 1998. | * Schutz, J., and R. Wallace. "A 450 MHz IA32 P6 family microprocessor." Solid-State Circuits Conference, 1998. Digest of Technical Papers. 1998 IEEE International. IEEE, 1998. | ||
* von Kaenel, Vincent, et al. "A 320 MHz, 1.5 mW@ 1.35 V CMOS PLL for microprocessor clock generation." IEEE Journal of Solid-State Circuits 31.11 (1996): 1715-1722. | * von Kaenel, Vincent, et al. "A 320 MHz, 1.5 mW@ 1.35 V CMOS PLL for microprocessor clock generation." IEEE Journal of Solid-State Circuits 31.11 (1996): 1715-1722. | ||
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