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{{lithography processes}}
 
{{lithography processes}}
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The '''150 nanometer (150 nm) lithography process''' is a [[technology node#half node|half-node]] semiconductor manufacturing process used as a stopgap between the [[180 nm lithography process|180 nm]] and [[130 nm lithography process|130 nm]] processes. Commercial [[integrated circuit]] manufacturing using 150 nm process began in early 2000s. This technology superseded by commercial [[130 nm]], [[110 nm]], and [[90 nm]] processes.
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The '''150 nm lithography process''' is a [[technology node#half node|half-node]] semiconductor manufacturing process used as a stopgap between the [[180 nm lithography process|180 nm]] and [[130 nm lithography process|130 nm]] processes. Commercial [[integrated circuit]] manufacturing using 55 nm process began in early 2000s. This technology superseded by commercial [[130 nm lithography process|130 nm process]] by 2001.
  
 
== Industry ==
 
== Industry ==
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On December 16, 1999, [[Samsung]] announced the development of a $1.8B ''Line 10'', a 1M meter² site in Hwasung-gun, Kyonggi Province. Line 10 was dedicated for the production of 128 MiB, 256 MiB and [[Rambus]] [[DRAM]]s on a 150 nm process. Line 10 opened in the third quarter of [[2000]] producing 16,000 [[wafer size|200 mm wafers]] per month going into full capacity in the in the first quarter of [[2001]] producing 32,000 [[wafers]] a month.
 
 
{{scrolling table/top|style=text-align: right; | first=Fab
 
{{scrolling table/top|style=text-align: right; | first=Fab
 
  |Process Name
 
  |Process Name
 
  |1st Production
 
  |1st Production
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|Metal Layers
 
 
  | 
 
  | 
 
  |Contacted Gate Pitch
 
  |Contacted Gate Pitch
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{{scrolling table/mid}}
 
{{scrolling table/mid}}
 
|-
 
|-
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! colspan="2" | [[TSMC]] !! colspan="2" | [[Fujitsu]] !! colspan="2" | [[Samsung]]
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! colspan="2" | [[TSMC]] !! colspan="2" | [[Fujitsu]]
 
|- style="text-align: center;"
 
|- style="text-align: center;"
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| colspan="2" |  || colspan="2" | CS-85 || colspan="2" |
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| colspan="2" |  || colspan="2" | CS-85
 
|- style="text-align: center;"
 
|- style="text-align: center;"
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| colspan="2" | 2000 || colspan="2" | 2002 || colspan="2" | 2002
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| colspan="2" | 2000 || colspan="2" | 2002
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|- style="text-align: center;"
 
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| colspan="2" |  || colspan="2" | 6  || colspan="2" |
 
 
|-
 
|-
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! Value !! [[180 nm]] Δ !! Value !! [[180 nm]] Δ !! Value !! [[180 nm]] Δ
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! Value !! [[180 nm]] Δ !! Value !! [[180 nm]] Δ
 
|-
 
|-
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| ? nm || ?x || ? nm || ?x || ? nm || ?x
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| ? nm || ?x || ? nm || ?x
 
|-
 
|-
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| ? nm || ?x || ? nm || ?x || ? nm || ?x
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| ? nm || ?x || ? nm || ?x
 
|-
 
|-
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| 3.42 µm<sup>2</sup> || 0.74x || ? µm<sup>2</sup> || ?x || ? µm<sup>2</sup> || ?x
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| 3.42 µm<sup>2</sup> || 0.74x || ? µm<sup>2</sup> || ?x
 
{{scrolling table/end}}
 
{{scrolling table/end}}
  
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* Cyrix
 
* Cyrix
 
** {{cyrix|Cyrix III}}
 
** {{cyrix|Cyrix III}}
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* HAL (Fujitsu)
 
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** {{hal|SPARC64 GP}}
 
 
{{expand list}}
 
{{expand list}}
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== 150 nm microarchitectures ==
 
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* VIA Technologies
 
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** {{via|Samuel 2|l=arch}}
 
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[[category:lithography]]
 

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