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  |1st Production
 
  |1st Production
 
  |Type
 
  |Type
−
|Wafer
 
 
  |Metal Layers
 
  |Metal Layers
 
  | 
 
  | 
 
  |Contacted Gate Pitch
 
  |Contacted Gate Pitch
 
  |Interconnect Pitch (M1P)
 
  |Interconnect Pitch (M1P)
−
  |SRAM bit cell (HP)​
+
  |SRAM bit cell
−
|SRAM bit cell (HD)​
 
 
}}
 
}}
 
{{scrolling table/mid}}
 
{{scrolling table/mid}}
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| colspan="2" | 2001 || colspan="2" | 2001 || colspan="2" | 2001 || colspan="2" | 2002 || colspan="2" | 2001 || colspan="2" | 2001 || colspan="2" | 2002 || colspan="2" | 2001 || colspan="2" | 2001 || colspan="2" | 2001 || colspan="2" |  
 
| colspan="2" | 2001 || colspan="2" | 2001 || colspan="2" | 2001 || colspan="2" | 2002 || colspan="2" | 2001 || colspan="2" | 2001 || colspan="2" | 2002 || colspan="2" | 2001 || colspan="2" | 2001 || colspan="2" | 2001 || colspan="2" |  
 
|- style="text-align: center;"
 
|- style="text-align: center;"
−
| colspan="8" | Bulk || colspan="2" | PDSOI || colspan="12" | Bulk
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| colspan="8" | Bulk || colspan="4" | PDSOI || colspan="10" | Bulk
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|- style="text-align: center;"
 
−
| colspan="22" | 200 mm
 
 
|- style="text-align: center;"
 
|- style="text-align: center;"
 
| colspan="2" | 6 || colspan="2" |  || colspan="2" |  || colspan="2" |  || colspan="2" | 8 || colspan="2" | 8 || colspan="2" |  || colspan="2" | 5 || colspan="2" | 7 || colspan="2" | 6 || colspan="2" | 7
 
| colspan="2" | 6 || colspan="2" |  || colspan="2" |  || colspan="2" |  || colspan="2" | 8 || colspan="2" | 8 || colspan="2" |  || colspan="2" | 5 || colspan="2" | 7 || colspan="2" | 6 || colspan="2" | 7
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! Value !! [[180 nm]] Δ !! Value !! [[180 nm]] Δ !! Value !! [[180 nm]] Δ !! Value !! [[180 nm]] Δ !! Value !! [[180 nm]] Δ !! Value !! [[180 nm]] Δ !! Value !! [[180 nm]] Δ !! Value !! [[180 nm]] Δ !! Value !! [[180 nm]] Δ !! Value !! [[180 nm]] Δ !! Value !! [[180 nm]] Δ
 
! Value !! [[180 nm]] Δ !! Value !! [[180 nm]] Δ !! Value !! [[180 nm]] Δ !! Value !! [[180 nm]] Δ !! Value !! [[180 nm]] Δ !! Value !! [[180 nm]] Δ !! Value !! [[180 nm]] Δ !! Value !! [[180 nm]] Δ !! Value !! [[180 nm]] Δ !! Value !! [[180 nm]] Δ !! Value !! [[180 nm]] Δ
 
|-
 
|-
−
| 319 nm || 0.66x || 310 nm || 0.72x || 350 nm || ?x || ? nm || ?x || 320 nm || 0.76x || 350 nm || ?x || 350 nm || ?x || ?nm || ?x || ?nm || ?x || ?nm || ?x || ?nm || ?x
+
| 319 nm || 0.66x || 310 nm || ?x || 350 nm || ?x || ? nm || ?x || 350 nm || ?x || ?nm || ?x || ?nm || ?x || ?nm || ?x || ?nm || ?x || ?nm || ?x || ?nm || ?x
−
|-
 
−
| 345 nm || 0.69x || 340 nm || 0.74x || 350 nm || ?x || ? nm || ?x || 320 nm || 0.73x || 350 nm || ?x || 350 nm || ?x || ?nm || ?x || ?nm || ?x || ?nm || ?x || ?nm || ?x
 
 
|-
 
|-
−
| 2.45 µm² || ?x  || ? µm² || ?x || ? µm² || ?x || ? µm² || ?x || ? µm² || ?x || ? µm² || ?x || ? µm² || ?x || ? µm² || ?x || ? µm² || ?x || ? µm² || ?x || ? µm² || ?x  
+
| 345 nm || 0.69x || 340 nm || ?x || 350 nm || ?x || ? nm || ?x || 320 nm || ?x || ?nm || ?x || ?nm || ?x || ?nm || ?x || ?nm || ?x || ?nm || ?x || ?nm || ?x
 
|-
 
|-
−
| 2.09 µm² || 0.36x || 2.14 µm² || 0.46x || ? µm² || ?x || 1.98 µm² || 0.47x || 1.8 µm² || ?x || ? µm² || ?x || ? µm² || ?x || ? µm² || ?x || ? µm² || ?x || ? µm² || ?x || ? µm² || ?x  
+
| 2.0 µm<sup>2</sup> || 0.36x || 2.14 µm<sup>2</sup> || 0.46x || ? µm<sup>2</sup> || ?x || 1.98 µm<sup>2</sup> || 0.47x || 1.8 µm<sup>2</sup> || ?x || ? µm<sup>2</sup> || ?x || ? µm<sup>2</sup> || ?x || ? µm<sup>2</sup> || ?x || ? µm<sup>2</sup> || ?x || ? µm<sup>2</sup> || ?x || ? µm<sup>2</sup> || ?x  
 
{{scrolling table/end}}
 
{{scrolling table/end}}
 
=== Design Rules ===
 
=== Design Rules ===
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== 130 nm Microprocessors==
 
== 130 nm Microprocessors==
−
* Ambric
 
−
** {{ambric|Am2000}}
 
 
* AMD
 
* AMD
 
** {{amd|Athlon 64}}
 
** {{amd|Athlon 64}}
 
** {{amd|Athlon MP}}
 
** {{amd|Athlon MP}}
 
** {{amd|Athlon XP}}
 
** {{amd|Athlon XP}}
−
** {{amd|Athlon XP-M}}
 
−
** {{amd|Geode NX}}
 
 
** {{amd|FX}}
 
** {{amd|FX}}
 
** {{amd|Opteron}}
 
** {{amd|Opteron}}
−
* Cavium
 
−
** {{cavium|OCTEON}}
 
−
* HAL (Fujitsu)
 
−
** {{hal|SPARC64 V}}
 
 
* IBM
 
* IBM
 
** {{ibm|Power4+}}
 
** {{ibm|Power4+}}
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** {{intel|Pentium M}}
 
** {{intel|Pentium M}}
 
** {{intel|Pentium 4 Extreme Edition}}
 
** {{intel|Pentium 4 Extreme Edition}}
−
* Intrinsity
 
−
** {{intrinsity|FastMATH}}
 
−
* Loongson
 
−
** {{loongson|Godson 2}}
 
−
* Qualcomm
 
−
** {{qualcomm|MSM6xxx}}
 
 
* SGI
 
* SGI
 
** {{sgi|R14000}}
 
** {{sgi|R14000}}
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** {{sun|UltraSPARC III Cu}}
 
** {{sun|UltraSPARC III Cu}}
 
** {{sun|UltraSPARC IIIi}}
 
** {{sun|UltraSPARC IIIi}}
−
 
+
* HAL (Fujitsu)
−
* NUDT
+
** {{hal|SPARC64 V}}
−
** {{nudt|FT-64}}
+
* Ambric
−
{{expand list}}
+
** {{ambric|AM2000}}
−
 
 
−
== 130 nm programmable logic devices ==
 
−
* MathStar
 
−
** {{mathstar|Builder}}
 
 
{{expand list}}
 
{{expand list}}
  
 
== 130 nm Microarchitectures ==
 
== 130 nm Microarchitectures ==
−
* AMD
 
−
** {{amd|K8|l=arch}}
 
−
* ARM
 
−
** {{armh|ARM7|l=arch}}
 
−
* IBM
 
−
** {{ibm|z990|l=arch}}
 
−
* VIA Technologies
 
−
** {{via|Nehemiah|l=arch}}
 
 
{{expand list}}
 
{{expand list}}
−
 
−
== References ==
 
−
* Tyagi, Sunit, et al. "A 130 nm generation logic technology featuring 70 nm transistors, dual Vt transistors and 6 layers of Cu interconnects." Electron Devices Meeting, 2000. IEDM'00. Technical Digest. International. IEEE, 2000.
 
−
 
−
[[category:lithography]]
 

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