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Editing 10 nm lithography process
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== Overview == | == Overview == | ||
− | First introduced between 2017-2019, the 10 nm [[process technology]] is characterized by its use of [[FinFET]] transistors with a 30-40s nm [[fin pitches]]. Those nodes typically have a [[gate pitch]] in range of 50-60s nm and a [[minimum metal pitch]] in the range of 30-40s nm | + | First introduced between 2017-2019, the 10 nm [[process technology]] is characterized by its use of [[FinFET]] transistors with a 30-40s nm [[fin pitches]]. Those nodes typically have a [[gate pitch]] in range of 50-60s nm and a [[minimum metal pitch]] in the range of 30-40s nm. |
== Industry == | == Industry == |