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  • microprocessor
    ...digital data consisting of instructions and possibly values; execute them by interpreting the instructions and performing a certain operation on the val ...tions for a second ISA specification. Those implementations are known as [[microarchitectures]]. The kind of tradeoffs made in a [[microarchitecture]] ultimately determi
    24 KB (3,402 words) - 22:43, 6 September 2024
  • nervana/microarchitectures/lake crest
    |atype=NPU |successor link=nervana/microarchitectures/spring crest
    2 KB (217 words) - 15:51, 6 August 2020
  • nervana/microarchitectures/spring crest
    |atype=NPU |designer 2=Intel
    11 KB (1,646 words) - 12:35, 26 April 2020
  • intel/microarchitectures/sunny cove
    {{intel title|Sunny Cove|arch}} |designer=Intel
    34 KB (5,187 words) - 05:27, 17 February 2023
  • nervana/nnp/nnp-t 1300
    |caption=NPU with 4 HBM2 stacks |designer=Intel
    2 KB (294 words) - 09:51, 1 February 2020
  • nervana/nnp/nnp-t 1400
    |caption=NPU with 4 HBM2 stacks |designer=Intel
    2 KB (305 words) - 09:51, 1 February 2020
  • nervana/nnp/nnp-i 1300
    |designer=Intel |manufacturer=Intel
    2 KB (220 words) - 11:49, 1 February 2020
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