From WikiChip
Xeon D-1571 - Intel
< intel‎ | xeon d

Edit Values
Xeon D-1571
broadwell de (front).png
General Info
DesignerIntel
ManufacturerIntel
Model NumberD-1571
Part NumberGG8067402570310
S-SpecSR2M0
MarketServer, Embedded
IntroductionFebruary 24, 2016 (announced)
February 24, 2016 (launched)
Release Price$1,222.00 (tray)
ShopAmazon
General Specs
FamilyXeon D
SeriesD-1500
LockedYes
Frequency1,300 MHz
Turbo Frequency2,100 MHz (1 core)
Bus typeDMI 2.0
Clock multiplier13
Microarchitecture
ISAx86-64 (x86)
MicroarchitectureBroadwell
PlatformGrangeville
Core NameBroadwell DE
Core Family6
Core Model6
Core SteppingY0
Process14 nm
Transistors4,700,000,000
TechnologyCMOS
Die306.18 mm²
Word Size64 bit
Cores16
Threads32
Max Memory128 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
TDP45 W
OP Temperature0 °C – 108 °C
Packaging
PackageFCBGA-1667 (FCBGA)
Dimension37.5 mm × 37.5 mm × 3.557 mm
Pitch0.7 mm
Contacts1667
broadwell de (back).png

Xeon D-1571 is a 64-bit hexadeca-core x86 microserver SoC introduced by Intel in early 2016. The D-1571 is based on the Broadwell microarchitecture and is fabricated on their 14 nm process. It operates at 1.3 GHz with a TDP of 45 W and a turbo frequency of 2.1 GHz. This processor supports up to 128 GiB of dual-channel DDR4-2400 memory.


Cache

Main article: Broadwell § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$1 MiB
1,024 KiB
1,048,576 B
L1I$512 KiB
524,288 B
0.5 MiB
16x32 KiB8-way set associative 
L1D$512 KiB
524,288 B
0.5 MiB
16x32 KiB8-way set associativewrite-back
L2$4 MiB
4,096 KiB
4,194,304 B
0.00391 GiB
  16x256 KiB8-way set associativewrite-back
L3$24 MiB
24,576 KiB
25,165,824 B
0.0234 GiB
  16x1.5 MiB16-way set associativewrite-back

Graphics

This SoC has no integrated graphics processing unit.

Memory controller

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR4-2400
Supports ECCYes
Max Mem128 GiB
Controllers1
Channels2
Max Bandwidth35.76 GiB/s
36,618.24 MiB/s
38.397 GB/s
38,397.008 MB/s
0.0349 TiB/s
0.0384 TB/s
Bandwidth
Single 17.88 GiB/s
Double 35.76 GiB/s

Expansions

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIeRevision: 3.0
Max Lanes: 24
Configuration: x16, x8, x4
PCIeRevision: 2.0
Max Lanes: 8
Configuration: x8, x4
USBRevision: 3.0
Max Ports: 4
USBRevision: 2.0
Max Ports: 4
SATARevision: 3
Max Ports: 6


Networking

[Edit/Modify Network Info]

ethernet plug icon.svg
Networking
Ethernet
10GbEYes (Ports: 2)

Features

[Edit/Modify Supported Features]

Cog-icon-grey.svg
Supported x86 Extensions & Processor Features
MMXMMX Extension
EMMXExtended MMX Extension
SSEStreaming SIMD Extensions
SSE2Streaming SIMD Extensions 2
SSE3Streaming SIMD Extensions 3
SSSE3Supplemental SSE3
SSE4.1Streaming SIMD Extensions 4.1
SSE4.2Streaming SIMD Extensions 4.2
AVXAdvanced Vector Extensions
AVX2Advanced Vector Extensions 2
ABMAdvanced Bit Manipulation
BMI1Bit Manipulation Instruction Set 1
BMI2Bit Manipulation Instruction Set 2
FMA33-Operand Fused-Multiply-Add
AESAES Encryption Instructions
RdRandHardware RNG
ADXMulti-Precision Add-Carry
CLMULCarry-less Multiplication Extension
F16C16-bit Floating Point Conversion
x86-1616-bit x86
x86-3232-bit x86
x86-6464-bit x86
RealReal Mode
ProtectedProtected Mode
SMMSystem Management Mode
FPUIntegrated x87 FPU
NXNo-eXecute
HTHyper-Threading
TBT 2.0Turbo Boost Technology 2.0
EISTEnhanced SpeedStep Technology
TXTTrusted Execution Technology (SMX)
VT-xVT-x (Virtualization)
VT-dVT-d (I/O MMU virtualization)
EPTExtended Page Tables (SLAT)
TSXTransactional Synchronization Extensions
Secure KeySecure Key Technology
SMEPOS Guard Technology
Retrieved from "https://en.wikichip.org/w/index.php?title=intel/xeon_d/d-1571&oldid=87689"
Facts about "Xeon D-1571 - Intel"
RDF feed
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Xeon D-1571 - Intel#pcie +
back imageFile:broadwell de (back).png +
base frequency1,300 MHz (1.3 GHz, 1,300,000 kHz) +
bus typeDMI 2.0 +
clock multiplier13 +
core count16 +
core family6 +
core model6 +
core nameBroadwell DE +
core steppingY0 +
designerIntel +
die area306.18 mm² (0.475 in², 3.062 cm², 306,180,000 µm²) +
familyXeon D +
first announcedFebruary 24, 2016 +
first launchedFebruary 24, 2016 +
full page nameintel/xeon d/d-1571 +
has advanced vector extensionstrue +
has advanced vector extensions 2true +
has ecc memory supporttrue +
has extended page tables supporttrue +
has featureTrusted Execution Technology +, Transactional Synchronization Extensions +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Enhanced SpeedStep Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Secure Key Technology + and OS Guard +
has intel enhanced speedstep technologytrue +
has intel secure key technologytrue +
has intel supervisor mode execution protectiontrue +
has intel trusted execution technologytrue +
has intel turbo boost technology 2 0true +
has intel vt-d technologytrue +
has intel vt-x technologytrue +
has locked clock multipliertrue +
has second level address translation supporttrue +
has simultaneous multithreadingtrue +
has transactional synchronization extensionstrue +
has x86 advanced encryption standard instruction set extensiontrue +
instance ofmicroprocessor +
isax86-64 +
isa familyx86 +
l1$ size1,024 KiB (1,048,576 B, 1 MiB) +
l1d$ description8-way set associative +
l1d$ size512 KiB (524,288 B, 0.5 MiB) +
l1i$ description8-way set associative +
l1i$ size512 KiB (524,288 B, 0.5 MiB) +
l2$ description8-way set associative +
l2$ size4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) +
l3$ description16-way set associative +
l3$ size24 MiB (24,576 KiB, 25,165,824 B, 0.0234 GiB) +
ldateFebruary 24, 2016 +
main imageFile:broadwell de (front).png +
manufacturerIntel +
market segmentServer + and Embedded +
max cpu count1 +
max memory131,072 MiB (134,217,728 KiB, 137,438,953,472 B, 128 GiB, 0.125 TiB) +
max memory bandwidth35.76 GiB/s (36,618.24 MiB/s, 38.397 GB/s, 38,397.008 MB/s, 0.0349 TiB/s, 0.0384 TB/s) +
max memory channels2 +
max operating temperature108 °C +
max sata ports6 +
max usb ports4 +
microarchitectureBroadwell +
min operating temperature0 °C +
model numberD-1571 +
nameXeon D-1571 +
packageFCBGA-1667 +
part numberGG8067402570310 +
platformGrangeville +
process14 nm (0.014 μm, 1.4e-5 mm) +
release price$ 1,222.00 (€ 1,099.80, £ 989.82, ¥ 126,269.26) +
release price (tray)$ 1,222.00 (€ 1,099.80, £ 989.82, ¥ 126,269.26) +
s-specSR2M0 +
seriesD-1500 +
smp max ways1 +
supported memory typeDDR4-2400 +
tdp45 W (45,000 mW, 0.0603 hp, 0.045 kW) +
technologyCMOS +
thread count32 +
transistor count4,700,000,000 +
turbo frequency (1 core)2,100 MHz (2.1 GHz, 2,100,000 kHz) +
word size64 bit (8 octets, 16 nibbles) +