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Ryzen Threadripper 3980X
General Info
Designer	AMD
Manufacturer	TSMC, GlobalFoundries
Model Number	3980X
Market	Desktop
Shop	Amazon
General Specs
Family	Ryzen Threadripper
Series	3900
Locked	No
Frequency	3,200 MHz
Turbo Frequency	4,500 MHz
Clock multiplier	32
Microarchitecture
ISA	x86-64 (x86)
Microarchitecture	Zen 2
Chipset	TRX40
Core Name	Castle Peak
Process	7 nm, 12 nm
Technology	CMOS
MCP	Yes (9 dies)
Word Size	64 bit
Cores	48
Threads	96
Multiprocessing
Max SMP	1-Way (Uniprocessor)
Electrical
TDP	280 W
Packaging
Unknown package "amd,socket_trx4"

Ryzen Threadripper 3980X is a 64-bit 48-core high-performance x86 desktop microprocessor expected to be introduced by AMD on February 7, 2020. The 3980X, which is based on their Zen 2 microarchitecture, is fabricated on TSMC's 7 nm process. The 3990X operates at a base frequency of 3.2 GHz with a TDP of 280 W and a boost of up to 4.5 GHz. This MPU supports up to 1 TiB of quad-channel DDR4-3200 memory.

Leaked Info! Some of the information presented in this article is solely based on leaks that were published online or obtained directly by WikiChip. It goes without saying that this information could change, be incomplete, wrong, or even made up. It's highly advised to wait for an official product announcement.

Preliminary Data! Information presented in this article deal with a microprocessor or chip that was recently announced or leaked, thus missing information regarding its features and exact specification. Information may be incomplete and can change by final release.

Cache

Main article: Zen 2 § Cache

[Edit/Modify Cache Info]

Cache Organization Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes.

L1$ 3 MiB 3,072 KiB 3,145,728 B L1I$ 1.5 MiB 1,536 KiB 1,572,864 B 48x32 KiB 8-way set associative   L1D$ 1.5 MiB 1,536 KiB 1,572,864 B 48x32 KiB 8-way set associative   L2$ 24 MiB 24,576 KiB 25,165,824 B 0.0234 GiB     48x512 KiB 8-way set associative write-back

Memory controller

[Edit/Modify Memory Info]

	Integrated Memory Controller
	Max Type DDR4-3200 Supports ECC Yes Max Mem 1 TiB Controllers 4 Channels 4 Max Bandwidth 95.37 GiB/s 97,658.88 MiB/s 102.403 GB/s 102,402.758 MB/s 0.0931 TiB/s 0.102 TB/s Bandwidth Single 23.84 GiB/s Double 47.68 GiB/s Quad 95.37 GiB/s

Expansions

[Edit/Modify Expansions Info]

	Expansion Options
PCIe Revision: 4.0 Max Lanes: 64 Configuration: 3x16+4x4

Features

[Edit/Modify Supported Features]

Supported x86 Extensions & Processor Features

MMX MMX Extension EMMX Extended MMX Extension SSE Streaming SIMD Extensions SSE2 Streaming SIMD Extensions 2 SSE3 Streaming SIMD Extensions 3 SSSE3 Supplemental SSE3 SSE4.1 Streaming SIMD Extensions 4.1 SSE4.2 Streaming SIMD Extensions 4.2 SSE4a Streaming SIMD Extensions 4a AVX Advanced Vector Extensions AVX2 Advanced Vector Extensions 2 ABM Advanced Bit Manipulation BMI1 Bit Manipulation Instruction Set 1 BMI2 Bit Manipulation Instruction Set 2 FMA3 3-Operand Fused-Multiply-Add AES AES Encryption Instructions RdRand Hardware RNG SHA SHA Extensions ADX Multi-Precision Add-Carry CLMUL Carry-less Multiplication Extension F16C 16-bit Floating Point Conversion x86-16 16-bit x86 x86-32 32-bit x86 x86-64 64-bit x86 Real Real Mode Protected Protected Mode SMM System Management Mode FPU Integrated x87 FPU NX No-eXecute SMT Simultaneous Multithreading AMD-Vi AMD-Vi (I/O MMU virtualization) AMD-V AMD Virtualization TSME Transparent SME SenseMI SenseMI Technology Boost 2 Precision Boost 2