Semiconductor & Computer Engineering
-
WikiChip
WikiChip
-
Architectures
Popular x86
-
Intel
- Client
- Server
- Big Cores
- Small Cores
-
AMD
Popular ARM
-
ARM
- Server
- Big
- Little
-
Cavium
-
Samsung
-
-
Chips
Popular Families
-
Ampere
-
Apple
-
Cavium
-
HiSilicon
-
MediaTek
-
NXP
-
Qualcomm
-
Renesas
-
Samsung
-
From WikiChip
File:cascade lake naming scheme.svg
Size of this PNG preview of this SVG file: 800 × 427 pixels. Other resolution: 320 × 171 pixels.
Original file (SVG file, nominally 1,063 × 567 pixels, file size: 15 KB)
Summary[edit]
Intel Cascade Lake naming scheme.
Licensing[edit]
 | Permission is given by the author to use the artwork on WikiChip only and for WikiChip publication only. Any use by anyone except WikiChip constitutes copyright infringement. |
File history
Click on a date/time to view the file as it appeared at that time.
| Date/Time | Thumbnail | Dimensions | User | Comment | |
|---|---|---|---|---|---|
| current | 16:33, 19 May 2019 | | 1,063 × 567 (15 KB) | David (talk | contribs) | Intel {{intel|Cascade Lake|l=arch}} naming scheme. |
- You cannot overwrite this file.
File usage
The following 3 pages link to this file:
Metadata
This file contains additional information, probably added from the digital camera or scanner used to create or digitize it.
If the file has been modified from its original state, some details may not fully reflect the modified file.
| Width | 300mm |
|---|---|
| Height | 160mm |
