An autonomous driving chip is a special system-on-a-chip designed specifically to interpret and recognize, in real-time, traffic-control devices in order to either assist a driver with control of the vehicle or in order to partially or fully automate all aspects of the dynamic driving task.

Overview

An autonomous driving chip is an SoC that has been specifically designed for partial or full automation of all aspect of the driving task. Those chips are typically designed to intake a large number of sensory inputs such as visual cameras, lidar, radar, ultrasonic, and [[inertial measurement unit]|IMUs]]. The data is then processed and a control plan is generated for the car to act on. Autonomous driving chips typically incorporate a high-throughput sensory input interface, a large number of cores for general purpose processing, neural processing units for efficient processing of artificial neural networks, a GPU for various post-processing operations, a computer vision processor for sensor processing, and various other hardware accelerators.

Safety

Due to the importance of safety involved in those chips, autonomous driving chips are often integrated into pairs or more for redundancy reasons. Within each chip, important operations such as final actuator control decisions are often checked with dual-core lockstep monitoring CPUs. Additionally, the chip itself typically meets various safety standards such as:

• ISO 26262 deals with functional safety in road vehicles. This standard deals with avoiding avoidable failures as well as detecting and handling unavoidable failures due to a malfunction.

• • Automotive Safety Integrity Level (ASIL) a hazards classification scheme. Four levels (A, B, C and D) are defined with D having the highest integrity requirements and A having the lowest.

• ISO/PAS 21448 extends 26262 to address safety of the intended functionality (SOTIF). Hazards and concerns are evaluated for the system, limitations and mitigations are outlined, defined, implemented, and verified. Final validation is done on the final system to ensure risk is eliminated.

• AEC-Q100 deals with the reliability of the integrated circuit under stress at various thermal conditions

Driving automation levels

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Chips

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