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From WikiChip
Chip-on-Wafer-on-Substrate (CoWoS) mult
< tsmc
| v · d · e | |
| Packaging | |
| Technologies | |
| Concepts | |
| Single-Row | |
| Dual-Row | |
| Quad-Row | |
| Grid Array | |
| 2.5D IC | |
| 3D IC | |
Chip-on-Wafer-on-Substrate (CoWoS) is a two-point-five dimensional integrated circuit (2.5D IC) through-silicon via (TSV) interposer-based packaging technology designed by TSMC.
Retrieved from "https://en.wikichip.org/w/index.php?title=tsmc/cowos&oldid=85999"