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Helio P10 M (MT6755M) - MediaTek
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Revision as of 12:47, 1 August 2018 by 66.69.53.11 (talk) (Added the LS755 to the list of devices that use this SoC, my daily-driver phone is currently an LS755 and it does use this SoC.)

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Helio P10 M
General Info
DesignerMediaTek,
ARM Holdings
ManufacturerTSMC
Model NumberP10 M
Part NumberMT6755M,
MTK6755M
MarketMobile, Embedded
IntroductionJune 1, 2015 (announced)
January, 2016 (launched)
General Specs
FamilyHelio
SeriesHelio P
Frequency1,800 MHz, 1,200 MHz
Bus typeAMBA 4 AXI
Microarchitecture
ISAARMv8 (ARM)
MicroarchitectureCortex-A53
Core NameCortex-A53
Process28 nm
TechnologyCMOS
Word Size64 bit
Cores8
Threads8
Max Memory4 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
Vcore1 V
VI/O1.8 V, 2.8 V, 3.3 V
OP Temperature-20 °C – 80 °C
Tjunction – 125 °C
Tstorage0 °C – 125 °C

Helio P10 M (MT6755M) is a 64-bit octa-core ARM LTE system on a chip designed by MediaTek and introduced in early-2016. This SoC, which incorporates eight Cortex-A53 cores and is manufactured on TSMC's 28 nm process, operates at up to 1.8 GHz and supports up to 4 GiB of single-channel LPDDR3-1866 memory. This chip incorporates the Mali-T880 IGP operating at 650 MHz. This SoC has a modem supporting LTE User Equipment (UE) category 6.

This processor is made of two independent clusters of Cortex-A53 with four cores each linked together via a CCI-400. The two clusters have a maximum operating frequency of 1.8 GHz and 1.2 GHz respectively.

The 'M' verison (MT6755M) is identical to the regular MT6755 except for the GPU and CPU lower clock speeds.

Cache

Main article: Cortex-A53 § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$512 KiB
524,288 B
0.5 MiB
L1I$256 KiB
262,144 B
0.25 MiB
8x32 KiB2-way set associative 
L1D$256 KiB
262,144 B
0.25 MiB
8x32 KiB4-way set associative 
L2$2 MiB
2,048 KiB
2,097,152 B
0.00195 GiB
  2x1 MiB16-way set associative 

Memory controller

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeLPDDR3-1866
Supports ECCNo
Max Mem4 GiB
Controllers1
Channels1
Width32 bit
Max Bandwidth6.95 GiB/s
7,116.8 MiB/s
7.463 GB/s
7,462.506 MB/s
0.00679 TiB/s
0.00746 TB/s
Bandwidth
Single 6.95 GiB/s

Expansions

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
USB
Revision2.0, 3.0
Ports8
UART
GP I/OYes


Graphics

[Edit/Modify IGP Info]

screen icon.svg
Integrated Graphics Information
GPUMali-T860
DesignerARM Holdings
Execution Units2
Frequency650 MHz
0.65 GHz
650,000 KHz
OutputDSI
Max Resolution
DSI1920x1080
Standards
Direct3D11.2
OpenGL3.2
OpenCL1.2
OpenGL ES3.2
OpenVG1.1
Vulkan1.0

Wireless

Antu network-wireless-connected-100.svgWireless Communications
Wi-Fi
WiFi
802.11nYes
Cellular
2G
CSD Yes
GSM Yes
GPRS Yes
EDGE Yes
3G
UMTS
TD-SCDMAYes
DC-HSDPAYes
HSUPAYes
4G
LTE Advanced
E-UTRANYes
UE Cat6

Image

  • Integrated image signal processor supports 21 MP
  • Supports image stabilization
  • Supports video stabilization
  • Supports noise reduction
  • Supports lens shading correction
  • Supports AE/AWB/AF
  • Supports edge enhancement
  • Supports face detection and visual tracking
  • Hardware JPEG encoder

Video

  • HEVC decoder 4k2k @ 30fps
  • H.264 decoder (30fps/40Mbps)
  • Sorenson H.263/H.263 decoder (1080p @ 60fps/40Mbps)
  • MPEG-4 SP/ASP decoder (1080p @ 60fps/40Mbps)
  • DIVX4/DIVX5/DIVX6/DIVX HD/XVID decoder (1080p @ 60fps/40Mbps)
  • VP8 / VC-1 decoders
  • MPEG-4 / H.263 / H.264 / HEVC encoders

Audio

  • Audio content sampling rates 8kHz to 192kHz
  • Audio content sampling format 8-bit/16-bit/24-bit Mono/Stereo
  • I2S, PCM
  • Encode: AMR-NB, AMR-WB, AAC, OGG, ADPCM
  • Decode: WAV, MP3, MP2, AAC, AMR-NB, AMR-WB, MIDI, Vorbis, APE, AAC-plus v1, AAC-plus v2, FLAC, WMA, ADPCM
  • 7.1 channel MHL output

Utilizing devices

  • Alcatel Pop 4S
  • Alcatel Flash Plus 2
  • Gionee M6
  • Gionee S6 Pro
  • InFocus S1
  • TP-Link Neffos X1
  • Vernee Mars
  • Meizu M3 Note
  • UMi Max
  • Vodafone Smart Ultra 7 VFD700
  • LG X power LS755

This list is incomplete; you can help by expanding it.

Retrieved from "https://en.wikichip.org/w/index.php?title=mediatek/helio/mt6755m&oldid=80959"
Facts about "Helio P10 M (MT6755M) - MediaTek"
RDF feed
base frequency1,800 MHz (1.8 GHz, 1,800,000 kHz) + and 1,200 MHz (1.2 GHz, 1,200,000 kHz) +
bus typeAMBA 4 AXI +
core count8 +
core nameCortex-A53 +
core voltage1 V (10 dV, 100 cV, 1,000 mV) +
designerMediaTek + and ARM Holdings +
familyHelio +
first announcedJune 1, 2015 +
first launchedJanuary 2016 +
full page namemediatek/helio/mt6755m +
has 2g supporttrue +
has 3g supporttrue +
has 4g supporttrue +
has csd supporttrue +
has dc-hsdpa supporttrue +
has e-utran supporttrue +
has ecc memory supportfalse +
has edge supporttrue +
has gprs supporttrue +
has gsm supporttrue +
has hsupa supporttrue +
has lte advanced supporttrue +
has td-scdma supporttrue +
has umts supporttrue +
instance ofmicroprocessor +
integrated gpuMali-T860 +
integrated gpu base frequency650 MHz (0.65 GHz, 650,000 KHz) +
integrated gpu designerARM Holdings +
integrated gpu execution units2 +
io voltage1.8 V (18 dV, 180 cV, 1,800 mV) +, 2.8 V (28 dV, 280 cV, 2,800 mV) + and 3.3 V (33 dV, 330 cV, 3,300 mV) +
isaARMv8 +
isa familyARM +
l1$ size512 KiB (524,288 B, 0.5 MiB) +
l1d$ description4-way set associative +
l1d$ size256 KiB (262,144 B, 0.25 MiB) +
l1i$ description2-way set associative +
l1i$ size256 KiB (262,144 B, 0.25 MiB) +
l2$ description16-way set associative +
l2$ size2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) +
ldateJanuary 2016 +
manufacturerTSMC +
market segmentMobile + and Embedded +
max cpu count1 +
max junction temperature398.15 K (125 °C, 257 °F, 716.67 °R) +
max memory4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) +
max memory bandwidth6.95 GiB/s (7,116.8 MiB/s, 7.463 GB/s, 7,462.506 MB/s, 0.00679 TiB/s, 0.00746 TB/s) +
max memory channels1 +
max operating temperature80 °C +
max storage temperature398.15 K (125 °C, 257 °F, 716.67 °R) +
microarchitectureCortex-A53 +
min operating temperature-20 °C +
min storage temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
model numberP10 M +
nameHelio P10 M +
part numberMT6755M + and MTK6755M +
process28 nm (0.028 μm, 2.8e-5 mm) +
seriesHelio P +
smp max ways1 +
supported memory typeLPDDR3-1866 +
technologyCMOS +
thread count8 +
used byAlcatel Pop 4S +, Alcatel Flash Plus 2 +, Gionee M6 +, Gionee S6 Pro +, InFocus S1 +, TP-Link Neffos X1 +, Vernee Mars +, Meizu M3 Note +, UMi Max + and Vodafone Smart Ultra 7 VFD700 +
user equipment category6 +
word size64 bit (8 octets, 16 nibbles) +