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Godson-2B - Loongson
Edit Values | |
Godson-2B | |
Godson-2B chip | |
General Info | |
Designer | Loongson |
Manufacturer | SMICS |
Model Number | 2B |
Part Number | MZD110 |
Market | Desktop |
Introduction | 2003 (announced) October 17, 2003 (launched) |
General Specs | |
Family | Godson 2 |
Series | Godson 2 |
Frequency | 300 MHz |
Microarchitecture | |
ISA | MIPS64 (MIPS) |
Microarchitecture | GS464 |
Core Name | GS464 |
Process | 180 nm |
Technology | CMOS |
Word Size | 64 bit |
Cores | 1 |
Threads | 1 |
Multiprocessing | |
Max SMP | 1-Way (Uniprocessor) |
Electrical | |
Power dissipation | 3 W |
Godson-2B (龙芯2B) is a 64-bit MIPS performance processor developed by ICT and later Loongson for desktop computers. Introduced in late 2003, the Godson-2B operates at up to 300 MHz consuming up to 3 W. This chip was manufactured on SMICS' 0.18 µm process and is known as China's first 64-bit microprocessor. This chip reached tapeout on August 13, 2003.
The Godson-2B is roughly three to five times the performance of the Godson 1.
Cache
- Main article: GS464 § Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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