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Xeon E3-1220 v5
General Info
Designer	Intel
Manufacturer	Intel
Model Number	E3-1220 v5
Part Number	CM8066201921804, BX80662E31220V5
S-Spec	SR2CQ, SR2LG
Market	Server
Introduction	October 19, 2015 (announced) October 19, 2015 (launched)
Release Price	$203.00
Shop	Amazon
General Specs
Family	Xeon E3
Series	E3-1200 v5
Locked	Yes
Frequency	3,000 MHz
Turbo Frequency	Yes
Turbo Frequency	3,500 MHz (1 core)
Bus type	DMI 3.0
Bus rate	4 × 8 GT/s
Clock multiplier	30
CPUID	506E3
Microarchitecture
ISA	x86-64 (x86)
Microarchitecture	Skylake
Platform	Greenlow
Chipset	Sunrise Point
Core Name	Skylake DT
Core Family	6
Core Model	94
Core Stepping	R0
Process	14 nm
Technology	CMOS
Die	122 mm²
Word Size	64 bit
Cores	4
Threads	4
Max Memory	64 GiB
Multiprocessing
Max SMP	1-Way (Uniprocessor)
Electrical
Vcore	0.55 V-1.52 V
TDP	80 W
Tjunction	0 °C – 100 °C
Tstorage	-25 °C – 125 °C
Packaging
Package FCLGA-1151 (LGA) FC-LGA14C Dimension 37.5 mm x 37.5 mm x 4.4 mm Pitch 0.914 mm Contacts 1151 Socket LGA-1151

Xeon E3-1220 v5 is an entry-level server and workstation 64-bit quad-core x86 microprocessor introduced by Intel in October 2015. This Skylake-based chip operates at 3 GHz with turbo boost of 3.5 GHz. The E3-1220 v5 has a TDP of 80 Watts and supports up to 64 GiB of dual-channel DDR4-2133 memory. This MPU has no integrated graphics processor.

Cache

Main article: Skylake § Cache

[Edit/Modify Cache Info]

Cache Organization Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes.

L1$ 256 KiB 262,144 B 0.25 MiB L1I$ 128 KiB 131,072 B 0.125 MiB 4x32 KiB 8-way set associative   L1D$ 128 KiB 131,072 B 0.125 MiB 4x32 KiB 8-way set associative write-back L2$ 1 MiB 1,024 KiB 1,048,576 B 9.765625e-4 GiB     4x256 KiB 4-way set associative write-back L3$ 8 MiB 8,192 KiB 8,388,608 B 0.00781 GiB     4x2 MiB   write-back

Memory controller

[Edit/Modify Memory Info]

	Integrated Memory Controller
	Max Type DDR3L-1600, DDR4-2133 Supports ECC Yes Max Mem 64 GiB Controllers 1 Channels 2 Max Bandwidth 31.79 GiB/s 32,552.96 MiB/s 34.134 GB/s 34,134.253 MB/s 0.031 TiB/s 0.0341 TB/s Bandwidth Single 15.89 GiB/s Double 31.79 GiB/s

Expansions

[Edit/Modify Expansions Info]

	Expansion Options
	PCIe Revision 3.0 Max Lanes 16 Configs 1x16, 2x8, 1x8+2x4

Graphics

This chip has no integrated graphics processing unit.

Features

[Edit/Modify Supported Features]

Supported x86 Extensions & Processor Features

MMX MMX Extension EMMX Extended MMX Extension SSE Streaming SIMD Extensions SSE2 Streaming SIMD Extensions 2 SSE3 Streaming SIMD Extensions 3 SSSE3 Supplemental SSE3 SSE4.1 Streaming SIMD Extensions 4.1 SSE4.2 Streaming SIMD Extensions 4.2 AVX Advanced Vector Extensions AVX2 Advanced Vector Extensions 2 ABM Advanced Bit Manipulation BMI1 Bit Manipulation Instruction Set 1 BMI2 Bit Manipulation Instruction Set 2 FMA3 3-Operand Fused-Multiply-Add AES AES Encryption Instructions RdRand Hardware RNG ADX Multi-Precision Add-Carry CLMUL Carry-less Multiplication Extension F16C 16-bit Floating Point Conversion x86-16 16-bit x86 x86-32 32-bit x86 x86-64 64-bit x86 Real Real Mode Protected Protected Mode SMM System Management Mode FPU Integrated x87 FPU NX No-eXecute TBT 2.0 Turbo Boost Technology 2.0 EIST Enhanced SpeedStep Technology TXT Trusted Execution Technology (SMX) vPro Intel vPro VT-x VT-x (Virtualization) VT-d VT-d (I/O MMU virtualization) EPT Extended Page Tables (SLAT) TSX Transactional Synchronization Extensions MPX Memory Protection Extensions SGX Software Guard Extensions Secure Key Secure Key Technology SMEP OS Guard Technology