From WikiChip
Baikal-T1 - Baikal Electronics
Edit Values | |
Baikal-T1 | |
General Info | |
Designer | Baikal Electronics, Imagination Technologies |
Manufacturer | TSMC |
Model Number | Baikal-T1 |
Market | Embedded |
Introduction | June 1, 2015 (announced) February, 2016 (launched) |
General Specs | |
Series | Baikal |
Frequency | 1200 MHz |
Bus type | AXI |
Microarchitecture | |
ISA | MIPS32 (MIPS) |
Microarchitecture | P5600 |
Core Name | P5600 |
Process | 28 nm |
Word Size | 32 bit |
Cores | 2 |
Threads | 2 |
Max Memory | 8 GiB |
Multiprocessing | |
Max SMP | 1-Way (Uniprocessor) |
Electrical | |
TDP | 5 W |
Tcase | 0 °C – 70 °C |
Baikal-T1 is a 32-bit dual-core MIPS system on a chip introduced by Baikal Electronics in 2015 for the embedded market. The chip entered mass production in early 2016. The Baikal-T1 incorporates two of Imagination high-performance P5600 cores and is manufactured on TSMC's 28 nm process. The Baikal-T1 supports up to 8 GiB of DDR3-1600.
The chip consumes less than 5W and can be used in fanless designs.
Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller
Integrated Memory Controller
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Expansions
Expansion Options
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Networking
Networking
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Block Diagram
Categories:
- all microprocessor models
- microprocessor models by baikal electronics
- microprocessor models by baikal electronics based on p5600
- microprocessor models by imagination technologies
- microprocessor models by imagination technologies based on p5600
- microprocessor models by tsmc
- Articles with invalid parameter in template
Facts about "Baikal-T1 - Baikal Electronics"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Baikal-T1 - Baikal Electronics#io + |
base frequency | 1,200 MHz (1.2 GHz, 1,200,000 kHz) + |
bus type | AXI + |
core count | 2 + |
core name | P5600 + |
designer | Baikal Electronics + and Imagination Technologies + |
first announced | June 1, 2015 + |
first launched | February 2016 + |
full page name | baikal/baikal-t1 + |
has ecc memory support | true + |
instance of | microprocessor + |
isa | MIPS32 + |
isa family | MIPS + |
l1$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l1d$ description | 4-way set associative + |
l1d$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l1i$ description | 4-way set associative + |
l1i$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l2$ description | 8-way set associative + |
l2$ size | 1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) + |
ldate | February 2016 + |
main image | + |
manufacturer | TSMC + |
market segment | Embedded + |
max case temperature | 343.15 K (70 °C, 158 °F, 617.67 °R) + |
max cpu count | 1 + |
max memory | 8,192 MiB (8,388,608 KiB, 8,589,934,592 B, 8 GiB, 0.00781 TiB) + |
max memory bandwidth | 11.92 GiB/s (12,206.08 MiB/s, 12.799 GB/s, 12,799.003 MB/s, 0.0116 TiB/s, 0.0128 TB/s) + |
max memory channels | 1 + |
max pcie lanes | 4 + |
microarchitecture | P5600 + |
min case temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
model number | Baikal-T1 + |
name | Baikal-T1 + |
process | 28 nm (0.028 μm, 2.8e-5 mm) + |
series | Baikal + |
smp max ways | 1 + |
supported memory type | DDR3-1600 + |
tdp | 5 W (5,000 mW, 0.00671 hp, 0.005 kW) + |
thread count | 2 + |
word size | 32 bit (4 octets, 8 nibbles) + |