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Am486DX2-100V8T - AMD
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Am486DX2-100V8T | |
General Info | |
Designer | AMD |
Manufacturer | AMD |
Model Number | Am486DX2-100V8T |
Part Number | A80486DX2-100V8T |
Market | Desktop |
Introduction | 1994 (launched) |
Shop | Amazon |
General Specs | |
Family | Am486 |
Series | Am486DX2V |
Frequency | 100 MHz |
Bus type | FSB |
Bus speed | 50 MHz |
Bus rate | 50 MT/s |
Clock multiplier | 2 |
Microarchitecture | |
Microarchitecture | 80486 |
Core Name | 486DX2V |
Process | 500 nm |
Technology | CMOS |
Word Size | 32 bit |
Cores | 1 |
Max Memory | 4 GiB |
Multiprocessing | |
Max SMP | 1-Way (Uniprocessor) |
Electrical | |
Vcore | 3.3 V ± 0.3 V |
OP Temperature | 0 °C – 85 °C |
Am486DX2-100V8T was an 80486-compatible microprocessor introduced by AMD in 1994. This processor had a clock multiplier of 2 having base frequency of 100 MHz with a bus frequency of 50 MHz. This model is essentially identical to Am486DX2-100. The new model name was used to differentiate it from the Am486DX2-100V8B which is a similar model with a Write-Back cache policy. The Am486DX2-100V16B is also similar models with double the cache size.
Cache
- Main article: 80486 § Cache
Cache Info [Edit Values] | ||
L1$ | 8 KiB 8,192 B 0.00781 MiB |
1x8 KiB 4-way set associative (unified, write-through policy) |
Graphics
This chip had no integrated graphics processing unit.
See also
Facts about "Am486DX2-100V8T - AMD"
l1$ description | 4-way set associative + |
l1$ size | 8 KiB (8,192 B, 0.00781 MiB) + |