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From WikiChip
Merced - Microarchitectures - Intel
< intel | microarchitectures
| Edit Values | |
| Merced µarch | |
| General Info | |
| Arch Type | CPU |
| Designer | Intel |
| Manufacturer | Intel |
| Introduction | June, 2001 |
| Process | 180 nm |
| Core Configs | 1 |
| Instructions | |
| ISA | IA-64 |
| Succession | |
Merced was the first Itanium microarchitecture designed by Intel.
Retrieved from "https://en.wikichip.org/w/index.php?title=intel/microarchitectures/merced&oldid=68776"
Facts about "Merced - Microarchitectures - Intel"
| codename | Merced + |
| core count | 1 + |
| designer | Intel + |
| first launched | June 2001 + |
| full page name | intel/microarchitectures/merced + |
| instance of | microarchitecture + |
| instruction set architecture | IA-64 + |
| manufacturer | Intel + |
| microarchitecture type | CPU + |
| name | Merced + |
| process | 180 nm (0.18 μm, 1.8e-4 mm) + |