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Am486DX4-100SV16B - AMD
Template:mpu Am486DX4-100SV16B was an Enhanced Am486 microprocessor introduced by AMD in 1997. This processor had a clock multiplier of 3 having a frequency of 100 MHz with a bus frequency of 33 MHz. This "Enhanced" Am486 includes some other features such as SMM, stop-clock control, and write-back cache. This model had larger L1 cache of 16 KB with Write-Back policy. This model has twice as much cache as the Am486DX4-100SV8B.
Contents
Cache
- Main article: 80486 § Cache
Cache Info [Edit Values] | ||
L1$ | 16 KiB 16,384 B 0.0156 MiB |
1x16 KiB 4-way set associative (unified, write-back policy) |
Graphics
This chip had no integrated graphics processing unit.
Features
- Stop-clock control
- System Management Mode (SMM)
Packaging
Part | Package |
---|---|
A80486DX4-100SV16B | CPGA-168 |
S80486DX4-100SV16B | SQFP-208 |
See also
Facts about "Am486DX4-100SV16B - AMD"
base frequency | 100 MHz (0.1 GHz, 100,000 kHz) + |
bus rate | 33 MT/s (0.033 GT/s, 33,000 kT/s) + |
bus speed | 33 MHz (0.033 GHz, 33,000 kHz) + |
bus type | FSB + |
clock multiplier | 3 + |
core count | 1 + |
core name | Am486DX4S + |
core voltage | 3.3 V (33 dV, 330 cV, 3,300 mV) + |
core voltage tolerance | 0.3 V + |
designer | AMD + |
family | Am486 + |
first launched | March 1997 + |
full page name | amd/am486/am486dx4-100sv16b + |
has feature | System Management Mode + |
instance of | microprocessor + |
l1$ description | 4-way set associative + |
l1$ size | 16 KiB (16,384 B, 0.0156 MiB) + |
ldate | March 1997 + |
manufacturer | AMD + |
max cpu count | 1 + |
max memory | 4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) + |
max operating temperature | 85 °C + |
microarchitecture | 80486 + |
min operating temperature | 0 °C + |
model number | Am486DX4-100SV16B + |
name | Am486DX4-100SV16B + |
part number | A80486DX4-100SV16B + and S80486DX4-100SV16B + |
process | 350 nm (0.35 μm, 3.5e-4 mm) + |
series | Am486DX4S + |
smp max ways | 1 + |
technology | CMOS + |
word size | 32 bit (4 octets, 8 nibbles) + |