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Am486DX2-80SV8B - AMD
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Template:mpu Am486DX2-80SV8B was an Enhanced Am486 microprocessor introduced by AMD in 1996. This processor had a clock multiplier of 2 having base frequency of 80 MHz with a bus frequency of 40 MHz. This "Enhanced" Am486 includes some other features such as SMM, stop-clock control, and write-back cache.

Cache

Main article: 80486 § Cache
Cache Info [Edit Values]
L1$ 8 KiB
8,192 B
0.00781 MiB
1x8 KiB 4-way set associative (unified, write-back policy)

Graphics

This chip had no integrated graphics processing unit.

Features

  • Stop-clock control
  • System Management Mode (SMM)

Documents

See also

Facts about "Am486DX2-80SV8B - AMD"
base frequency80 MHz (0.08 GHz, 80,000 kHz) +
bus rate40 MT/s (0.04 GT/s, 40,000 kT/s) +
bus speed40 MHz (0.04 GHz, 40,000 kHz) +
bus typeFSB +
clock multiplier2 +
core count1 +
core nameAm486DX2S +
core voltage3.3 V (33 dV, 330 cV, 3,300 mV) +
core voltage tolerance0.3 V +
designerAMD +
familyAm486 +
first announced1995 +
first launchedMarch 1996 +
full page nameamd/am486/am486dx2-80sv8b +
has featureSystem Management Mode +
instance ofmicroprocessor +
l1$ description4-way set associative +
l1$ size8 KiB (8,192 B, 0.00781 MiB) +
ldateMarch 1996 +
manufacturerAMD +
max cpu count1 +
max memory4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) +
max operating temperature85 °C +
microarchitecture80486 +
min operating temperature0 °C +
model numberAm486DX2-80SV8B +
nameAm486DX2-80SV8B +
part numberA80486DX2-80SV8B +
process500 nm (0.5 μm, 5.0e-4 mm) +
seriesAm486DX2S +
smp max ways1 +
technologyCMOS +
word size32 bit (4 octets, 8 nibbles) +