Template:mpu The Atom x5-Z8500 is a 64-bit quad-core system on a chip introduce by Intel in early 2015. This ultra-low power SoC has a scenario design power of 2 W and operates at a base frequency of 1.44 GHz with a burst up to 2.24 GHz and supports up to 8 GiB of memory. This chip incorporates the HD Graphics (Cherry Trail) GPU.

Cache

Main article: Airmont § Cache

Cache Info [Edit Values]
L1I$	128 KiB 131,072 B 0.125 MiB	4x32 KiB 8-way set associative (per core)
L1D$	96 KiB 98,304 B 0.0938 MiB	4x24 KiB 6-way set associative (per core)
L2$	2 MiB 2,048 KiB 2,097,152 B 0.00195 GiB	2x1 MiB 16-way set associative (per 2 cores)
L3$	0 KiB 0 MiB 0 B 0 GiB	No L3$

Memory controller

Integrated Memory Controller
Type	DDR3L-RS 1600, LPDDR3 1600
Controllers	1
Channels	2
ECC Support	Yes
Bandwidth (single)	12,800 MB/s
Bandwidth (dual)	25,600 MB/s
Max memory	8,192 MB

Graphics

Integrated Graphic Information
GPU	HD Graphics (Cherry Trail)
Execution Units	12
Displays	3
Frequency	200 MHz 0.2 GHz 200,000 KHz
Max frequency	600 MHz 0.6 GHz 600,000 KHz
Max memory	8 GiB 8,192 MiB 8,388,608 KiB 8,589,934,592 B
Output	Embedded DisplayPort, HDMI
DirectX	11.1
OpenGL	4.3
OpenCL	1.2
OpenGL ES	3.0
DVI	1.4b
HDMI	1.4b
DVI	1.4b
Vulkan	1.0
DP	1.1a
eDP	1.3
Max HDMI Res	3840x2160 @60
Max DVI Res	3840x2160 @60 Hz
Max DSI Res	2560x1600 @60 Hz
Max DP Res	2560x1600 @60
Max eDP Res	2560x1600 @60 Hz

• Video decode hardware acceleration including support for H.263, MPEG4, H.264, H.265 (HEVC), VP8, VP9, MVC, MPEG2, VC1, JPEG.
• Video encode hardware acceleration including support for H.264, H.263, VP8, MVC, JPEG.
• Four planes available per pipe - 1x Primary, 2x Video Sprite & 1x Cursor.
• Two dedicated digital Display Serial Interface PHYs implementing MIPI-DSI support.

Storage

• SD Card support (x1 SDR104)
• SDIO support (x1 SDR104)
• eMMC support (4.51)

Audio

• Low Power Engine (3 I2S ports)

Package

Property	Value
Type	17x17mm Type 4
IO count	628
Ball count	1380
Ball pitch	0.4mm
Z-height	0.937mm