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From WikiChip
PEZY-SC3 - PEZY
< pezy | pezy-scx
Revision as of 05:02, 23 June 2017 by Inject (talk | contribs) (Created page with "{{pezy title|PEZY-SC3}} '''PEZY-SC4''' ('''PEZY Super Computer 4''') is fifth generation many-core microprocessor planned by PEZY. The SC4 is planned to have 16,192 co...")
PEZY-SC4 (PEZY Super Computer 4) is fifth generation many-core microprocessor planned by PEZY. The SC4 is planned to have 16,192 cores, twice as many cores as its predecessor.
Memory controller
Integrated Memory Controller
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Integrated Memory Controller
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Facts about "PEZY-SC4 - PEZY"
has ecc memory support | true + and false + |
max memory bandwidth | 119.2 GiB/s (122,060.8 MiB/s, 127.99 GB/s, 127,990.025 MB/s, 0.116 TiB/s, 0.128 TB/s) + and 22,886.4 GiB/s (23,435,673.6 MiB/s, 24,574.085 GB/s, 24,574,084.881 MB/s, 22.35 TiB/s, 24.574 TB/s) + |
max memory channels | 4 + and 8 + |
supported memory type | DDR5-4000 + |