Template:mpu
Helio X30 is a 64-bit deca-core ARM LTE system on a chip designed by MediaTek and set to be launched in early 2017. This SoC incorporates 3 independent clusters of cores (called "Tri-Cluster" by MediaTek) operating at varying degrees of performance designed for certain workloads (operating at 2 GHz, 2.2 GHz, and 2.8 GHz) and supports dual-channel LPDDR3-1866. This SoC also incorporates a PowerVR GT7400 IGP operating at 870 MHz. The chip has a modem supporting LTE User Equipment (UE) category 10.
Architecture
The Helio X30 is designed is composed of 3 individual clusters of CPU cores depending on the level of performance required by the active applications.
The three clusters are designed as a modified big.LITTLE configuration.
Cache
- Main articles: Cortex-A53 § Cache and Cortex-A73 § Cache
Memory controller
[Edit/Modify Memory Info]
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Integrated Memory Controller
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Max Type | LPDDR3-1866 |
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Supports ECC | No |
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Max Mem | 8 GiB |
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Controllers | 1 |
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Channels | 2 |
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Max Bandwidth | 27.81 GiB/s 28,477.44 MiB/s 29.861 GB/s 29,860.76 MB/s 0.0272 TiB/s 0.0299 TB/s
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Bandwidth |
Single 13.9 GiB/s Double 27.81 GiB/s
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Expansions
Graphics
[Edit/Modify IGP Info]
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Integrated Graphics Information
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GPU | PowerVR GT7400 |
Designer | Imagination Technologies |
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Frequency | 870 MHz 0.87 GHz 870,000 KHz
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Output | DSI |
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| Max Resolution | |
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| Standards | Direct3D | 11.2 |
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OpenGL | 3.1 | OpenCL | 1.2 | OpenGL ES | 3.1 | Vulkan | 1.0 |
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Wireless
Wireless Communications |
Wi-Fi |
WiFi | |
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Cellular |
2G | CSD | | Yes | GSM | | Yes | GPRS | | Yes | EDGE | | Yes |
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3G | UMTS | TD-SCDMA | Yes | DC-HSDPA | Yes | HSUPA | Yes | |
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CDMA2000 | |
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4G | |
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