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From WikiChip
					
    Xeon E5-4655 v4  - Intel    
                	
														Template:mpu The Xeon E5-4655 v4 is a 64-bit octa-core x86 microprocessor introduced by Intel in 2016. This server MPU is designed for frequency-optimized 4S environments. Operating at 2.5 GHz with a turbo boost frequency of 3.2 GHz for a single active core, this MPU has a TDP of 135 W and is manufactured on a 14 nm process (based on Broadwell).
Cache
- Main article: Broadwell § Cache
| Cache Info [Edit Values] | ||
| L1I$ | 256 KiB 262,144 B  0.25 MiB | 8x32 KiB 8-way set associative (per core, write-back) | 
| L1D$ | 256 KiB 262,144 B  0.25 MiB | 8x32 KiB 8-way set associative (per core, write-back) | 
| L2$ | 4 MiB 4,096 KiB  4,194,304 B 0.00391 GiB | 8x256 KiB 8-way set associative (per core, write-back) | 
| L3$ | 30 MiB 30,720 KiB  31,457,280 B 0.0293 GiB | 8x3.75 MiB 20-way set associative (shared, per core, write-back) | 
Facts about "Xeon E5-4655 v4  - Intel"
| l1d$ description | 8-way set associative + | 
| l1d$ size | 256 KiB (262,144 B, 0.25 MiB) + | 
| l1i$ description | 8-way set associative + | 
| l1i$ size | 256 KiB (262,144 B, 0.25 MiB) + | 
| l2$ description | 8-way set associative + | 
| l2$ size | 4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) + | 
| l3$ description | 20-way set associative + | 
| l3$ size | 30 MiB (30,720 KiB, 31,457,280 B, 0.0293 GiB) + |