-
WikiChip
WikiChip
-
Architectures
Popular x86
-
Intel
- Client
- Server
- Big Cores
- Small Cores
-
AMD
Popular ARM
-
ARM
- Server
- Big
- Little
-
Cavium
-
Samsung
-
-
Chips
Popular Families
-
Ampere
-
Apple
-
Cavium
-
HiSilicon
-
MediaTek
-
NXP
-
Qualcomm
-
Renesas
-
Samsung
-
From WikiChip
x86
x86 ISA | |
Developer | Intel AMD |
Dev model | Proprietary |
Design | Von Neumann |
Data word size | 8 bit 1 octets , 16 bit2 nibbles 2 octets , 32 bit4 nibbles 4 octets , 64 bit8 nibbles 8 octets , 128 bit16 nibbles 16 octets , 256 bit32 nibbles 32 octets , 512 bit64 nibbles 64 octets
128 nibbles |
Instruction word size | Variable "Variable" is not a number.
|
Introduction | 1978 |
Format | Register-Memory |
Endianness | Little-endian |
ISAs • By Company • By Inst • By Data |
x86 is a family of little-endian instruction set architectures and extensions. As its namesake indicates, the x86 ISA offers binary compatibility all the way from the original 8086 to modern microarchitectures as well as source code compatibility since the 8080. The architecture is widely used in the desktop and server markets by a number of companies including Intel, AMD, VIA, DM&P, and RDC.
Retrieved from "https://en.wikichip.org/w/index.php?title=x86&oldid=26220"
Facts about "x86"
designer | Intel + and AMD + |
first launched | 1978 + |
full page name | x86 + |
instance of | instruction set architecture + |
name | x86 + |
word size | 8 bit (1 octets, 2 nibbles) +, 16 bit (2 octets, 4 nibbles) +, 32 bit (4 octets, 8 nibbles) +, 64 bit (8 octets, 16 nibbles) +, 128 bit (16 octets, 32 nibbles) +, 256 bit (32 octets, 64 nibbles) + and 512 bit (64 octets, 128 nibbles) + |