Template:mpu The Duron 1000 based on the Morgan core was a 32-bit x86 microprocessor developed by AMD and introduced in mid-2001. This model was part of the second generation of the Duron family. Designed based on AMD's K7 (a Thunderbird-derivative) on a 180 nm process, this MPU operated at 1000 MHz with a bus capable of 200 MT/s with a max TDP of 46.1 W and a typical TDP of 42.4 W.

Cache

Main article: K7 § Cache

Cache Info [Edit Values]
L1I$	64 KiB 65,536 B 0.0625 MiB	1x64 KiB 2-way set associative
L1D$	64 KiB 65,536 B 0.0625 MiB	1x64 KiB 2-way set associative
L2$	64 KiB 0.0625 MiB 65,536 B 6.103516e-5 GiB	1x64 KiB 16-way set associative

Graphics

This SoC has no integrated graphics processing unit.

Features

• Halt State
• Sleep State

Documents

DataSheet

• AMD Duron Processor Model 3 Data Sheet; Publication # 23802; Rev: I; Issue Date: June 2001.
• AMD Duron Processor Model 7 Data Sheet; Publication # 24310; Rev: G; Issue Date: January 2002.

Other

• AMD Duron Processor Model 7 Revision Guide; Publication # 24806; Rev: E; Issue Date: October 2003.

See also

• Duron
• Celeron