Semiconductor & Computer Engineering
From WikiChip
Piton - Princeton
Template:mpu Piton is a 64-bit many-core microprocessor developed by Princeton's Parallel Computing Group and announced in August of 2016. The MPPA chip contains 25 modified OpenSPARC T1 cores (an implementation of SPARC V9). The chip, which was manufactured on IBM's 32 nm SOI process, operates at 1 GHz. The chip was presented On August 32 2016 at the Hot Chips 28.
Facts about "Piton - Princeton"
| base frequency | 1,000 MHz (1 GHz, 1,000,000 kHz) + |
| bus rate | 2,800 MT/s (2.8 GT/s, 2,800,000 kT/s) + |
| bus speed | 350 MHz (0.35 GHz, 350,000 kHz) + |
| clock multiplier | 2.85 + |
| core count | 25 + |
| core voltage | 0.9 V (9 dV, 90 cV, 900 mV) + |
| designer | Princeton + |
| die area | 36 mm² (0.0558 in², 0.36 cm², 36,000,000 µm²) + |
| die length | 6 mm (0.6 cm, 0.236 in, 6,000 µm) + |
| die width | 6 mm (0.6 cm, 0.236 in, 6,000 µm) + |
| first announced | August 23, 2016 + |
| full page name | princeton/piton + |
| instance of | microprocessor + |
| l1d$ description | 4-way set associative + |
| l1d$ size | 200 KiB (204,800 B, 0.195 MiB) + |
| l2$ description | 4-way set associative + |
| l2$ size | 1.5 MiB (1,536 KiB, 1,572,864 B, 0.00146 GiB) + |
| ldate | August 23, 2016 + |
| main image |  + |
| main image caption | Piton face + |
| manufacturer | IBM + |
| market segment | Server + |
| max cpu count | 20,000 + |
| name | Piton + |
| process | 32 nm (0.032 μm, 3.2e-5 mm) + |
| smp max ways | 20,000 + |
| technology | CMOS + |
| thread count | 50 + |
| transistor count | 460,000,000 + |
| word size | 64 bit (8 octets, 16 nibbles) + |
