From WikiChip
Talk:intel/microarchitectures/broadwell (client)
< Talk:intel‎ | microarchitectures
Revision as of 00:39, 18 July 2016 by 195.241.129.245 (talk)

This is the discussion page for the intel/microarchitectures/broadwell (client) page.

dubious intel statement on scheduler size

According to the Intel presentation slides, they have "Larger out-of-order scheduler" but what's not clear is what they meant by that. The ROB seems to remain at 192 entries. Scheduler is still at 60 entries. Or am I missing something? --At32Hz (talk) 16:20, 14 April 2016 (EDT)

Source for scheduler size increase

Intel source for the increase in scheduler from 60 to 64: https://intel.lanyonevents.com/sz15/connect/fileDownload/session/ECA57E7DBF19B1A610382EB5ABF2B651/SZ15_ARCS001_100_ENGf.pdf slide 21

Also the instruction queue is increased from 2x20 to 2x25, but [citation needed] I guess, can't find it anymore :) --195.241.129.245 01:39, 18 July 2016 (EDT)