From WikiChip
Builder - MathStar
< mathstar
Revision as of 03:05, 27 June 2016 by ChipIt (talk | contribs)

Builder
Developer MathStar
Manufacturer TSMC
Type Programmable logic device
Introduction 2002 (announced)
2003 (launch)
Production 2003-2003
Word size 16 bit
2 octets
4 nibbles
Process 130 nm
0.13 μm
1.3e-4 mm
Technology CMOS
Clock 100 MHz-1,000 MHz

Builder was a family of FPOAs introduced by MathStar in 2003. This family the earliest attempt at designing an FPOA and was discontinued shortly after due to some technical issues.

Architecture

Main article: field-programmable object array

The Builder family was the MathStar's initial attempt at a field-programmable object array. Each chip contains 100s of silicon objects laid out in a grid, broken down to arrays of five objects each. Instructions are loaded to each of the objects at power-up.

mathstar layout.png

Inter-Object communication was done primarily by passing data to the nearest neighbor through a unidirectional synchronous interconnect. Communication is configured dynamically and on-demand. Each object had the facilities needed for clock synchronization, built-in self-test, etc...

Object

There are five different types of components: Arithmetic Logic Unit (ALU), Content Addressable Memory (CAM), Cyclic Redundancy Check (CRC), Multiply Accumulator (MAC), and Register File (RF). The control program guides the overall program execution and the datapath setup. Datapath is 16-bit-bit but may be combined with adjacent objects to form larger datapaths of desired size.

Facts about "Builder - MathStar"
designerMathStar +
first announced2002 +
first launched2003 +
full page namemathstar/builder +
instance ofintegrated circuit family +
main designerMathStar +
manufacturerTSMC +
nameBuilder +
process130 nm (0.13 μm, 1.3e-4 mm) +
technologyCMOS +
word size16 bit (2 octets, 4 nibbles) +