Template:mpu Am486DX4-100SV8B was an Enhanced Am486 microprocessor introduced by AMD in 1996. This processor had a clock multiplier of 3 having a frequency of 100 MHz with a bus frequency of 33 MHz. This "Enhanced" Am486 includes some other features such as SMM, stop-clock control, and write-back cache. AMD later introduced the Am486DX4-100SV16B which was identical but had its L1$ doubled to 16 KB.

Cache

Main article: 80486 § Cache

Cache Info [Edit Values]
L1$	8 KB "KB" is not declared as a valid unit of measurement for this property.	1x8 KB 4-way set associative (unified, write-back policy)

Graphics

This chip had no integrated graphics processing unit.

Features

• Stop-clock control
• System Management Mode (SMM)

Packaging

Part	Package
A80486DX4-100SV8B	CPGA-168
S80486DX4-100SV8B	SQFP-208

Documents

• AMD Enhanced Am486 (March, 1996)

See also

• Am486 family