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    Xeon D-1559  - Intel    
                	
														Template:mpu The Xeon D-1559 is a 64-bit octa-core x86-64 microserver SoC that was introduced by Intel in April of 2016. The D-1559 operates at 1.5 GHz with a turbo frequency of 2.1 GHz. This chip, which is based on the Broadwell microarchitecture and manufactured in 14 nm process, has a TDP of 45 W and can support up to 128 GB of RAM (DDR3L/DDR4).
Cache
- Main article: Broadwell § Cache
| Cache Info [Edit Values] | ||
| L1I$ | 384 KB "KB" is not declared as a valid unit of measurement for this property. | 12x32 KB 8-way set associative (per core) | 
| L1D$ | 384 KB "KB" is not declared as a valid unit of measurement for this property. | 12x32 KB 8-way set associative (per core) | 
| L2$ | 3 MB "MB" is not declared as a valid unit of measurement for this property. | 12x256 KB 8-way set associative (per core) | 
| L3$ | 18 MB "MB" is not declared as a valid unit of measurement for this property. | 8x1.5 MB (per core) | 
Graphics
This SoC has no integrated graphics processing unit.
Memory controller
| Integrated Memory Controller | |
| Type | DDR3L-1333, DDR3L-1600, DDR4-1600, DDR4-1867, DDR4-2133 | 
| Controllers | 1 | 
| Channels | 2 | 
| ECC Support | Yes | 
| Max memory | 128 GB | 
Expansions
Networking
| Networking | |
| SFI interface | Yes | 
| KR interface | Yes | 
| 10Base-T | No | 
| 100Base-T | No | 
| 1000Base-T | Yes | 
| 10GBase-T | Yes | 
Features
Facts about "Xeon D-1559  - Intel"
| l1d$ description | 8-way set associative + | 
| l1i$ description | 8-way set associative + | 
| l2$ description | 8-way set associative + |