Edit Values

* ERROR: "name" is missing!

96-Core 6-Chiplet 3D stacked MIPS processor (no actual name was given to the project) was a large-scale high-performance SoC technology demonstration by CEA-Leti. The project comprised 96 MIPS cores built using 6 chiplets 3D stack on an active interposer in order to demonstarte in-package silicon scale-out capabilities with superior inter-chip capabilities while reducing the overall power and production cost.