Elbrus-8S
Developer	MCST
Type	Microprocessors
Introduction	2016 (launch)
Architecture	Elbrus (VLIW), version 4
Word size	64 bit 8 octets 16 nibbles
Process	28 nm 0.028 μm 2.8e-5 mm
Clock	1300 MHz (1891ВМ10АЯ), 1000 MHz (1891ВМ10БЯ)
Package	FCBGA 2028
Succession
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Elbrus-4S

Elbrus-8S (rus. Эльбрус-8С, code designation: 1891ВМ10АЯ, 1891ВМ10БЯ) is an universal multi-core VLIW microprocessor with the Elbrus architecture, developed by the russian company MCST.

Overview

The «Elbrus-8S» is an eight-core microprocessor. First level cache memory is 64 Kbytes (for data) and 128 Kbytes (for instructions) in each core. Second level cache memory is 512 Kbytes in each core. The general third level cache memory is 16 MB in the microprocessor. The «Elbrus-8S» microprocessor has 4 channels of memory access (DDR3-1600) and 3 channels of interprocessor communication. Scalability - 4 microprocessors in a computing module. Each microprocessor core executes 25 instructions per cycle. The peak microprocessor performance is 125 ... 250 Gflops. The microprocessor contains hardware support for binary translation of 64-bit Intel/AMD codes.

The average power dissipation is 80 watts for the 1300 MHz version (1891ВМ10АЯ) and 60 watts for the 1000 MHz version (1891ВМ10БЯ). Operating conditions - at a temperature from −60°C to +85°C degrees.

The microprocessor is intended for use in multiprocessor servers, workstations and on-board computer systems.