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Helio P15 |
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Designer | MediaTek, ARM Holdings |
Manufacturer | TSMC |
Model Number | P15 |
Part Number | MT6755T |
Market | Mobile, Embedded |
Introduction | October 17, 2016 (announced) April, 2017 (launched) |
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Family | Helio |
Series | Helio P |
Frequency | 2,200 MHz, 1,200 MHz |
Bus type | AMBA 4 AXI |
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ISA | ARMv8 (ARM) |
Microarchitecture | Cortex-A53 |
Core Name | Cortex-A53 |
Process | 28 nm |
Technology | CMOS |
Word Size | 64 bit |
Cores | 8 |
Threads | 8 |
Max Memory | 4 GiB |
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Max SMP | 1-Way (Uniprocessor) |
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Vcore | 1 V |
VI/O | 1.8 V, 2.8 V, 3.3 V |
OP Temperature | -20 °C – 80 °C |
Tjunction | – 125 °C |
Tstorage | 0 °C – 125 °C |
Helio P15 (MT6755T) is a 64-bit octa-core ARM LTE system on a chip designed by MediaTek and introduced in early-2016. This SoC, which incorporates eight Cortex-A53 cores and is manufactured on TSMC's 28 nm process, operates at up to 2.2 GHz and supports up to 4 GiB of single-channel LPDDR3-1866 memory. This chip incorporates the Mali-T880 IGP operating at 800 MHz. This SoC has a modem supporting LTE User Equipment (UE) category 6.
This processor is made of two independent clusters of Cortex-A53 with four cores each linked together via a CCI-400. The two clusters have a maximum operating frequency of 2.2 GHz and 1.2 GHz respectively.
The Helio P15 is identical to the Helio P10 with higher clock speeds for both the GPU and CPU.
Cache
- Main article: Cortex-A53 § Cache
[Edit/Modify Cache Info]
![hierarchy icon.svg](/w/images/thumb/e/e4/hierarchy_icon.svg/75px-hierarchy_icon.svg.png) |
Cache Organization Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes.
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L1$ | 512 KiB 524,288 B 0.5 MiB
| L1I$ | 256 KiB 262,144 B 0.25 MiB
| 8x32 KiB | 2-way set associative | |
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L1D$ | 256 KiB 262,144 B 0.25 MiB
| 8x32 KiB | 4-way set associative | |
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| L2$ | 2 MiB 2,048 KiB 2,097,152 B 0.00195 GiB
| | | 2x1 MiB | 16-way set associative | |
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Memory controller
[Edit/Modify Memory Info]
![ram icons.svg](/w/images/thumb/a/af/ram_icons.svg/75px-ram_icons.svg.png) |
Integrated Memory Controller
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Max Type | LPDDR3-1866 |
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Supports ECC | No |
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Max Mem | 4 GiB |
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Controllers | 1 |
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Channels | 1 |
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Width | 32 bit |
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Max Bandwidth | 6.95 GiB/s 7,116.8 MiB/s 7.463 GB/s 7,462.506 MB/s 0.00679 TiB/s 0.00746 TB/s
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Bandwidth |
Single 6.95 GiB/s
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Expansions
Graphics
[Edit/Modify IGP Info]
![screen icon.svg](/w/images/thumb/2/29/screen_icon.svg/75px-screen_icon.svg.png) |
Integrated Graphics Information
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GPU | Mali-T860 |
Designer | ARM Holdings |
Execution Units | 2 |
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Frequency | 800 MHz 0.8 GHz 800,000 KHz
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Output | DSI |
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| Max Resolution | |
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| Standards | Direct3D | 11.2 |
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OpenGL | 3.2 | OpenCL | 1.2 | OpenGL ES | 3.2 | OpenVG | 1.1 | Vulkan | 1.0 |
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Wireless
Wireless Communications |
Wi-Fi |
WiFi | |
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Cellular |
2G | CSD | | Yes | GSM | | Yes | GPRS | | Yes | EDGE | | Yes |
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3G | UMTS | TD-SCDMA | Yes | DC-HSDPA | Yes | HSUPA | Yes | |
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4G | |
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Image
- Integrated image signal processor supports 21 MP
- Supports image stabilization
- Supports video stabilization
- Supports noise reduction
- Supports lens shading correction
- Supports AE/AWB/AF
- Supports edge enhancement
- Supports face detection and visual tracking
- Hardware JPEG encoder
Video
- HEVC decoder 4k2k @ 30fps
- H.264 decoder (30fps/40Mbps)
- Sorenson H.263/H.263 decoder (1080p @ 60fps/40Mbps)
- MPEG-4 SP/ASP decoder (1080p @ 60fps/40Mbps)
- DIVX4/DIVX5/DIVX6/DIVX HD/XVID decoder (1080p @ 60fps/40Mbps)
- VP8 / VC-1 decoders
- MPEG-4 / H.263 / H.264 / HEVC encoders
Audio
- Audio content sampling rates 8kHz to 192kHz
- Audio content sampling format 8-bit/16-bit/24-bit Mono/Stereo
- I2S, PCM
- Encode: AMR-NB, AMR-WB, AAC, OGG, ADPCM
- Decode: WAV, MP3, MP2, AAC, AMR-NB, AMR-WB, MIDI, Vorbis, APE, AAC-plus v1, AAC-plus v2, FLAC, WMA, ADPCM
- 7.1 channel MHL output
Utilizing devices
Template:Motorola Moto m
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