From WikiChip
Chip-on-Wafer-on-Substrate (CoWoS) mult
< tsmc
Revision as of 00:11, 11 January 2019 by David (talk | contribs) (cowos)
(diff) ← Older revision | Latest revision (diff) | Newer revision → (diff)

v · d · e
Packaging
wc 3d stack.svg
Technologies
Concepts
Single-Row
Dual-Row
Quad-Row
Grid Array
2.5D IC
3D IC

Chip-on-Wafer-on-Substrate (CoWoS) is a two-point-five dimensional integrated circuit (2.5D IC) through-silicon via (TSV) interposer-based packaging technology designed by TSMC.

Retrieved from "https://en.wikichip.org/w/index.php?title=tsmc/cowos&oldid=85999"