From WikiChip
Z+ SoC - Zhongshan Subor
Revision as of 19:35, 19 September 2018 by At32Hz (talk | contribs) (At32Hz moved page zhongshan subor/z+ to zhongshan subor/fireflight)

Edit Values
Z+ SoC
General Info
DesignerAMD,
Zhongshan Subor
Model NumberZ+ SoC
MarketConsole, Desktop
IntroductionAugust 3, 2018 (announced)
August 3, 2018 (launched)
ShopAmazon
General Specs
Frequency3,000 MHz
Bus typePCIe 3.0
Bus rate4 × 8 GT/s
Clock multiplier30
Microarchitecture
ISAx86-64 (x86)
MicroarchitectureZen
TechnologyCMOS
Word Size64 bit
Cores4
Threads8
Max Memory8 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)

Z+ SoC is a semi-custom quad-core x86 SoC designed by AMD for Zhongshan Subor for their gaming PC/consoles and introduced in mid-2018. The Z+ features four Zen cores operating at 3 GHz along with a 24-CU Radeon Vega GPU operating at up to 1.3 GHz.

Cache

Main article: Zen § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$384 KiB
393,216 B
0.375 MiB
L1I$256 KiB
262,144 B
0.25 MiB
4x64 KiB4-way set associative 
L1D$128 KiB
131,072 B
0.125 MiB
4x32 KiB8-way set associativewrite-back

L2$2 MiB
2,048 KiB
2,097,152 B
0.00195 GiB
  4x512 KiB8-way set associativewrite-back

L3$4 MiB
4,096 KiB
4,194,304 B
0.00391 GiB
  1x4 MiB  

Memory controller

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeGDDR5
Max Mem8 GiB
Frequency1200 MHz
Width256 bit
Max Bandwidth143.1 GiB/s
146,534.4 MiB/s
153.652 GB/s
153,652.455 MB/s
0.14 TiB/s
0.154 TB/s

Graphics

The Z+ features a Radeon Vega GPU with 24 compute units. The Compute Units operate at 1,300 MHz, each with 64 32-bit floating point multiply-accumulate units. At 1.3 GHz with 128 FLOP/cycle this chip can deliver 3.994 TFLOPS raw peak performance - about 66% the performance of the Scorpio Engine (6 TFLOPS) and three times its predecessor.

Z+ GPU
Unified shaders1536 (64 × 24 CUs)
ROPs32
TMUs96
Peak Performance ~4 TFLOPS (3,994,000,000,000 FLOPS)

[Edit/Modify IGP Info]

screen icon.svg
Integrated Graphics Information
GPURadeon Vega
DesignerAMD
Execution Units24Max Displays3
Unified Shaders1536
Max Memory8 GiB
8,192 MiB
8,388,608 KiB
8,589,934,592 B
Burst Frequency1,300 MHz
1.3 GHz
1,300,000 KHz
OutputDP, HDMI

Standards
DirectX12
OpenGL4.6
OpenCL2.0
Vulkan1.1

Features

[Edit/Modify Supported Features]

Cog-icon-grey.svg
Supported x86 Extensions & Processor Features
MMXMMX Extension
EMMXExtended MMX Extension
SSEStreaming SIMD Extensions
SSE2Streaming SIMD Extensions 2
SSE3Streaming SIMD Extensions 3
SSSE3Supplemental SSE3
SSE4.1Streaming SIMD Extensions 4.1
SSE4.2Streaming SIMD Extensions 4.2
SSE4aStreaming SIMD Extensions 4a
AVXAdvanced Vector Extensions
AVX2Advanced Vector Extensions 2
ABMAdvanced Bit Manipulation
BMI1Bit Manipulation Instruction Set 1
BMI2Bit Manipulation Instruction Set 2
FMA33-Operand Fused-Multiply-Add
FMA44-Operand Fused-Multiply-Add
AESAES Encryption Instructions
RdRandHardware RNG
SHASHA Extensions
ADXMulti-Precision Add-Carry
CLMULCarry-less Multiplication Extension
F16C16-bit Floating Point Conversion
x86-1616-bit x86
x86-3232-bit x86
x86-6464-bit x86
RealReal Mode
ProtectedProtected Mode
SMMSystem Management Mode
FPUIntegrated x87 FPU
NXNo-eXecute
AMD-ViAMD-Vi (I/O MMU virtualization)
AMD-VAMD Virtualization
SenseMISenseMI Technology
XFRExtended Frequency Range
Boost 2Precision Boost 2
base frequency3,000 MHz (3 GHz, 3,000,000 kHz) +
bus links4 +
bus rate8,000 MT/s (8 GT/s, 8,000,000 kT/s) +
bus typePCIe 3.0 +
clock multiplier30 +
core count4 +
designerAMD + and Zhongshan Subor +
first announcedAugust 3, 2018 +
first launchedAugust 3, 2018 +
full page namezhongshan subor/fireflight +
has advanced vector extensionstrue +
has advanced vector extensions 2true +
has amd amd-v technologytrue +
has amd amd-vi technologytrue +
has amd extended frequency rangetrue +
has amd precision boost 2true +
has amd sensemi technologytrue +
has ecc memory supportfalse +
has featureAdvanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, SenseMI Technology +, Extended Frequency Range + and Precision Boost 2 +
has x86 advanced encryption standard instruction set extensiontrue +
instance ofmicroprocessor +
integrated gpuRadeon Vega +
integrated gpu designerAMD +
integrated gpu execution units24 +
integrated gpu max frequency1,300 MHz (1.3 GHz, 1,300,000 KHz) +
integrated gpu max memory8,192 MiB (8,388,608 KiB, 8,589,934,592 B, 8 GiB) +
isax86-64 +
isa familyx86 +
l1$ size384 KiB (393,216 B, 0.375 MiB) +
l1d$ description8-way set associative +
l1d$ size128 KiB (131,072 B, 0.125 MiB) +
l1i$ description4-way set associative +
l1i$ size256 KiB (262,144 B, 0.25 MiB) +
l2$ description8-way set associative +
l2$ size2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) +
l3$ size4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) +
ldateAugust 3, 2018 +
market segmentConsole + and Desktop +
max cpu count1 +
max memory8,192 MiB (8,388,608 KiB, 8,589,934,592 B, 8 GiB, 0.00781 TiB) +
max memory bandwidth143.1 GiB/s (146,534.4 MiB/s, 153.652 GB/s, 153,652.455 MB/s, 0.14 TiB/s, 0.154 TB/s) +
microarchitectureZen +
model numberFireFlight +
nameFireFlight +
smp max ways1 +
supported memory typeGDDR5 +
technologyCMOS +
thread count8 +
word size64 bit (8 octets, 16 nibbles) +