From WikiChip
EPYC Embedded 3251 - AMD
< amd‎ | epyc embedded
Revision as of 13:08, 22 February 2018 by At32Hz (talk | contribs) (Created page with "{{amd title|EPYC Embedded 3251}} {{chip}}")
(diff) ← Older revision | Latest revision (diff) | Newer revision → (diff)

Edit Values
no photo (ic).svg
General Info
Microarchitecture
Retrieved from "https://en.wikichip.org/w/index.php?title=amd/epyc_embedded/3251&oldid=74274"
Facts about "EPYC Embedded 3251 - AMD"
RDF feed
base frequency2,500 MHz (2.5 GHz, 2,500,000 kHz) +
clock multiplier25 +
core count8 +
core nameSnowy Owl +
designerAMD +
die area213 mm² (0.33 in², 2.13 cm², 213,000,000 µm²) +
familyEPYC Embedded +
first announcedFebruary 21, 2018 +
first launchedFebruary 21, 2018 +
full page nameamd/epyc embedded/3251 +
instance ofmicroprocessor +
isax86-64 +
isa familyx86 +
ldateFebruary 21, 2018 +
manufacturerGlobalFoundries +
market segmentServer + and Embedded +
max cpu count1 +
max junction temperature378.15 K (105 °C, 221 °F, 680.67 °R) +
max memory524,288 MiB (536,870,912 KiB, 549,755,813,888 B, 512 GiB, 0.5 TiB) +
microarchitectureZen +
min junction temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
model number3251 +
nameEPYC Embedded 3251 +
process14 nm (0.014 μm, 1.4e-5 mm) +
series3000 +
smp max ways1 +
tdp50 W (50,000 mW, 0.0671 hp, 0.05 kW) +
technologyCMOS +
thread count16 +
transistor count4,800,000,000 +
turbo frequency (1 core)3,100 MHz (3.1 GHz, 3,100,000 kHz) +
word size64 bit (8 octets, 16 nibbles) +