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Xeon E5-2695 v4 - Intel
Template:mpu The Xeon E5-2695 v4 is a 64-bit octadeca-core x86 microprocessor introduced by Intel in 2016. This server MPU is designed for segment-optimized 2S environments (1U Square form factors). Operating at 2.1 GHz with a turbo boost frequency of 3.3 GHz for a single active core, this MPU has a TDP of 120 W and is manufactured on a 14 nm process (based on Broadwell).
Cache
- Main article: Broadwell § Cache
| Cache Info [Edit Values] | ||
| L1I$ | 576 KiB 589,824 B 0.563 MiB |
18x32 KiB 8-way set associative (per core, write-back) |
| L1D$ | 576 KiB 589,824 B 0.563 MiB |
18x32 KiB 8-way set associative (per core, write-back) |
| L2$ | 4.5 MiB 4,608 KiB 4,718,592 B 0.00439 GiB |
18x256 KiB 8-way set associative (per core, write-back) |
| L3$ | 45 MiB 46,080 KiB 47,185,920 B 0.0439 GiB |
18x2.5 MiB 20-way set associative (shared, per core, write-back) |
Graphics
This microprocessor has no integrated graphics processing unit.
Memory controller
| Integrated Memory Controller | |
| Type | DDR4-2400 |
| Controllers | 2 |
| Channels | 4 (2 per controller) |
| ECC Support | Yes |
| Max bandwidth | 71.53 GiB/s |
| Bandwidth (single) | 17.88 GiB/s |
| Bandwidth (dual) | 35.76 GiB/s |
| Max memory | 1,536 GiB |
| Physical Address Extensions | 46 bit |
Expansions
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Expansion Options
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Features
[Edit/Modify Supported Features]
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Supported x86 Extensions & Processor Features
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Facts about "Xeon E5-2695 v4 - Intel"
| Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Xeon E5-2695 v4 - Intel#io + |
| base frequency | 2,100 MHz (2.1 GHz, 2,100,000 kHz) + |
| bus links | 2 + |
| bus rate | 9,600 MT/s (9.6 GT/s, 9,600,000 kT/s) + |
| bus speed | 4,800 MHz (4.8 GHz, 4,800,000 kHz) + |
| bus type | QPI + |
| chipset | C610 Series + |
| clock multiplier | 21 + |
| core count | 18 + |
| core family | 6 + |
| core model | 4F + |
| core name | Broadwell EP + |
| core stepping | B0 + |
| core voltage | 1.82 V (18.2 dV, 182 cV, 1,820 mV) + |
| cpuid | 406F1 + |
| designer | Intel + |
| die area | 456.12 mm² (0.707 in², 4.561 cm², 456,120,000 µm²) + |
| family | Xeon E5 + |
| first announced | June 20, 2016 + |
| first launched | June 20, 2016 + |
| full page name | intel/xeon e5/e5-2695 v4 + |
| has advanced vector extensions | true + |
| has advanced vector extensions 2 | true + |
| has extended page tables support | true + |
| has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Trusted Execution Technology +, Intel vPro Technology +, Extended Page Tables + and Transactional Synchronization Extensions + |
| has intel enhanced speedstep technology | true + |
| has intel trusted execution technology | true + |
| has intel turbo boost technology 2 0 | true + |
| has intel vpro technology | true + |
| has locked clock multiplier | true + |
| has second level address translation support | true + |
| has simultaneous multithreading | true + |
| has transactional synchronization extensions | true + |
| has x86 advanced encryption standard instruction set extension | true + |
| instance of | microprocessor + |
| io voltage | 1.2 V (12 dV, 120 cV, 1,200 mV) + |
| io voltage tolerance | 3% + |
| l1d$ description | 8-way set associative + |
| l1d$ size | 576 KiB (589,824 B, 0.563 MiB) + |
| l1i$ description | 8-way set associative + |
| l1i$ size | 576 KiB (589,824 B, 0.563 MiB) + |
| l2$ description | 8-way set associative + |
| l2$ size | 4.5 MiB (4,608 KiB, 4,718,592 B, 0.00439 GiB) + |
| l3$ description | 20-way set associative + |
| l3$ size | 45 MiB (46,080 KiB, 47,185,920 B, 0.0439 GiB) + |
| ldate | June 20, 2016 + |
| manufacturer | Intel + |
| market segment | Server + |
| max case temperature | 357.15 K (84 °C, 183.2 °F, 642.87 °R) + |
| max cpu count | 2 + |
| max memory | 1,572,864 MiB (1,610,612,736 KiB, 1,649,267,441,664 B, 1,536 GiB, 1.5 TiB) + |
| max pcie lanes | 40 + |
| max storage temperature | 398.15 K (125 °C, 257 °F, 716.67 °R) + |
| microarchitecture | Broadwell + |
| min case temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
| min storage temperature | 248.15 K (-25 °C, -13 °F, 446.67 °R) + |
| model number | E5-2695 v4 + |
| name | Xeon E5-2695 v4 + |
| part number | CM8066002023801 + and BX80660E52695V4 + |
| platform | Grantley EP 2S + |
| process | 14 nm (0.014 μm, 1.4e-5 mm) + |
| release price | $ 2,424.00 (€ 2,181.60, £ 1,963.44, ¥ 250,471.92) + |
| s-spec | SR2J1 + |
| s-spec (qs) | QK3E + |
| series | E5-2000 + |
| smp max ways | 2 + |
| tdp | 120 W (120,000 mW, 0.161 hp, 0.12 kW) + |
| technology | CMOS + |
| thread count | 36 + |
| transistor count | 7,200,000,000 + |
| turbo frequency (10 cores) | 2,600 MHz (2.6 GHz, 2,600,000 kHz) + |
| turbo frequency (11 cores) | 2,600 MHz (2.6 GHz, 2,600,000 kHz) + |
| turbo frequency (12 cores) | 2,600 MHz (2.6 GHz, 2,600,000 kHz) + |
| turbo frequency (13 cores) | 2,600 MHz (2.6 GHz, 2,600,000 kHz) + |
| turbo frequency (14 cores) | 2,600 MHz (2.6 GHz, 2,600,000 kHz) + |
| turbo frequency (15 cores) | 2,600 MHz (2.6 GHz, 2,600,000 kHz) + |
| turbo frequency (16 cores) | 2,600 MHz (2.6 GHz, 2,600,000 kHz) + |
| turbo frequency (17 cores) | 2,600 MHz + |
| turbo frequency (18 cores) | 2,600 MHz + |
| turbo frequency (1 core) | 3,300 MHz (3.3 GHz, 3,300,000 kHz) + |
| turbo frequency (2 cores) | 3,300 MHz (3.3 GHz, 3,300,000 kHz) + |
| turbo frequency (3 cores) | 3,100 MHz (3.1 GHz, 3,100,000 kHz) + |
| turbo frequency (4 cores) | 3,000 MHz (3 GHz, 3,000,000 kHz) + |
| turbo frequency (5 cores) | 2,900 MHz (2.9 GHz, 2,900,000 kHz) + |
| turbo frequency (6 cores) | 2,800 MHz (2.8 GHz, 2,800,000 kHz) + |
| turbo frequency (7 cores) | 2,700 MHz (2.7 GHz, 2,700,000 kHz) + |
| turbo frequency (8 cores) | 2,600 MHz (2.6 GHz, 2,600,000 kHz) + |
| turbo frequency (9 cores) | 2,600 MHz (2.6 GHz, 2,600,000 kHz) + |
| word size | 64 bit (8 octets, 16 nibbles) + |