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From WikiChip
Celeron J4005
< intel | celeron
Edit Values | |
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General Info | |
Microarchitecture |
Facts about "Celeron J4005 - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Celeron J4005 - Intel#package + |
base frequency | 2,000 MHz (2 GHz, 2,000,000 kHz) + |
clock multiplier | 20 + |
core count | 2 + |
core name | Gemini Lake + |
core stepping | B0 + |
designer | Intel + |
family | Celeron + |
first announced | December 11, 2017 + |
first launched | December 11, 2017 + |
full page name | intel/celeron/j4005 + |
has locked clock multiplier | true + |
instance of | microprocessor + |
isa | x86-64 + |
isa family | x86 + |
ldate | December 11, 2017 + |
main image | ![]() |
manufacturer | Intel + |
market segment | Desktop + |
max cpu count | 1 + |
max memory | 8,192 MiB (8,388,608 KiB, 8,589,934,592 B, 8 GiB, 0.00781 TiB) + |
microarchitecture | Goldmont Plus + |
model number | J4005 + |
name | Celeron J4005 + |
package | FCBGA-1090 + |
part number | FH8068003067416 + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
release price | $ 107.00 (€ 96.30, £ 86.67, ¥ 11,056.31) + |
s-spec | SR3S5 + |
series | 4000 + |
smp max ways | 1 + |
tdp | 10 W (10,000 mW, 0.0134 hp, 0.01 kW) + |
technology | CMOS + |
thread count | 2 + |
turbo frequency (1 core) | 2,700 MHz (2.7 GHz, 2,700,000 kHz) + |
word size | 64 bit (8 octets, 16 nibbles) + |