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Denverton - Cores - Intel
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Denverton | |||||||||||
General Info | |||||||||||
Designer | Intel | ||||||||||
Manufacturer | Intel | ||||||||||
Introduction | Feb 23, 2017 (announced) Feb 23, 2017 (launched) | ||||||||||
Microarchitecture | |||||||||||
ISA | x86-64 (x86) | ||||||||||
Microarchitecture | Goldmont | ||||||||||
Word Size | 8 octets 64 bit16 nibbles | ||||||||||
Process | 14 nm 0.014 μm 1.4e-5 mm | ||||||||||
Technology | CMOS | ||||||||||
Clock | 1,500 MHz - 2,200 MHz | ||||||||||
Packaging | |||||||||||
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Succession | |||||||||||
Denverton is the core name for Intel's ultra-low power series of server system on chips serving as a successor to Avoton. Those chips are aimed at a wide array of markets such as ULP servers, networking, storage, edge, and IoT. Denverton chips are manufactured on Intel's 14 nm process and are based on the Goldmont microarchitecture.
Features
This section is empty; you can help add the missing info by editing this page. |
Members
Denverton Microprocessors | |||||||||
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Model | Family | Price | Launched | TDP | SDP | Freq | Name | Freq | Max Freq |
Count: 15 |
See also
- Goldmont
- Apollo Lake
- Denverton
- Willow Trail
- Broxton
- Airmont
Facts about "Denverton - Cores - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Denverton - Cores - Intel#package + |
designer | Intel + |
first announced | February 23, 2017 + |
first launched | February 23, 2017 + |
instance of | core + |
isa | x86-64 + |
isa family | x86 + |
manufacturer | Intel + |
microarchitecture | Goldmont + |
name | Denverton + |
package | FCBGA-1310 + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
technology | CMOS + |
word size | 64 bit (8 octets, 16 nibbles) + |