Semiconductor & Computer Engineering
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R-Car L1 - Renesas
Template:mpu R-Car L1 is a performance embedded SoC for the automotive industry designed by Renesas. The L1 features a single Cortex-A9 core operating at 400 MHz. This chip incorporates Imagination's PowerVR SGX531 GPU. This SoC supports up to 1 GiB of DDR3-1066 memory.
Facts about "R-Car L1 - Renesas"
| Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | R-Car L1 - Renesas#package + |
| base frequency | 400 MHz (0.4 GHz, 400,000 kHz) + |
| core count | 1 + |
| core name | Cortex-A9 + |
| core voltage | 1.2 V (12 dV, 120 cV, 1,200 mV) + |
| designer | Renesas + and ARM Holdings + |
| family | R-Car + |
| full page name | renesas/r-car/l1 + |
| has ecc memory support | false + |
| instance of | microprocessor + |
| integrated gpu | PowerVR SGX531 + |
| integrated gpu designer | Imagination Technologies + |
| integrated gpu execution units | 1 + |
| io voltage | 3.3 V (33 dV, 330 cV, 3,300 mV) + |
| isa | ARMv7 + |
| isa family | ARM + |
| l1$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
| l1d$ description | 4-way set associative + |
| l1d$ size | 32 KiB (32,768 B, 0.0313 MiB) + |
| l1i$ description | 4-way set associative + |
| l1i$ size | 32 KiB (32,768 B, 0.0313 MiB) + |
| ldate | 1900 + |
| manufacturer | TSMC + |
| market segment | Embedded + |
| max cpu count | 1 + |
| max memory | 1,024 MiB (1,048,576 KiB, 1,073,741,824 B, 1 GiB, 9.765625e-4 TiB) + |
| max memory bandwidth | 1.99 GiB/s (2,037.76 MiB/s, 2.137 GB/s, 2,136.746 MB/s, 0.00194 TiB/s, 0.00214 TB/s) + |
| max memory channels | 1 + |
| microarchitecture | Cortex-A9 + |
| model number | L1 + |
| name | R-Car L1 + |
| package | FCBGA-429 + |
| process | 40 nm (0.04 μm, 4.0e-5 mm) + |
| series | 1st Gen + |
| smp max ways | 1 + |
| supported memory type | DDR3-1066 + and DDR2-533 + |
| technology | CMOS + |
| thread count | 1 + |
| word size | 32 bit (4 octets, 8 nibbles) + |