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R-Car M1A - Renesas
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Template:mpu R-Car M1A is a mid-range performance embedded dual-core SoC for the automotive industry designed by Renesas and introduced in 2011. The M1A features a single Cortex-A9 core and an additional SH-4A core, both operating at 800 MHz. This SoC supports up to 1 GiB of dual-channel DDR3-1066 memory.

Facts about "R-Car M1A - Renesas"
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
R-Car M1A - Renesas#package +
base frequency800 MHz (0.8 GHz, 800,000 kHz) +
core count2 +
core nameCortex-A9 + and SH-4A +
core voltage1.2 V (12 dV, 120 cV, 1,200 mV) +
designerRenesas + and ARM Holdings +
familyR-Car +
first announcedFebruary 16, 2011 +
first launchedJune 2012 +
full page namerenesas/r-car/m1a +
has ecc memory supportfalse +
instance ofmicroprocessor +
integrated gpuPowerVR SGX540 +
integrated gpu base frequency200 MHz (0.2 GHz, 200,000 KHz) +
integrated gpu designerImagination Technologies +
integrated gpu execution units2 +
io voltage3.3 V (33 dV, 330 cV, 3,300 mV) +
isaARMv7 + and SuperH +
isa familyARM + and SuperH +
l1$ size128 KiB (131,072 B, 0.125 MiB) +
l1d$ description4-way set associative +
l1d$ size64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description4-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
ldateJune 2012 +
manufacturerTSMC +
market segmentEmbedded +
max memory1,024 MiB (1,048,576 KiB, 1,073,741,824 B, 1 GiB, 9.765625e-4 TiB) +
max memory bandwidth7.95 GiB/s (8,140.8 MiB/s, 8.536 GB/s, 8,536.248 MB/s, 0.00776 TiB/s, 0.00854 TB/s) +
max memory channels2 +
microarchitectureCortex-A9 + and SH-4A +
model numberM1A +
nameR-Car M1A +
packageFCBGA-472 +
part numberR8A77781 +
process40 nm (0.04 μm, 4.0e-5 mm) +
release price$ 70.00 (€ 63.00, £ 56.70, ¥ 7,233.10) +
series1st Gen +
supported memory typeDDR3-1066 + and DDR2-800 +
technologyCMOS +
thread count2 +
word size32 bit (4 octets, 8 nibbles) +