From WikiChip
					
    Xeon E3-1205 v6  - Intel    
                	
														Template:mpu The Xeon E3-1205 v6 is an entry-level workstations and servers 64-bit x86 quad-core microprocessor designed by Intel and set to be released in late 2016 or early 2017. This Kaby Lake-based chip operates at 3 GHz.
Cache
- Main article: Kaby Lake § Cache
 
| 
 Cache Organization  
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes.  | 
|||||||||||||||||||||||||||||||||||||
  | 
|||||||||||||||||||||||||||||||||||||
Memory controller
| 
 Integrated Memory Controller 
 | 
||||||||||||||
  | 
||||||||||||||
Expansions
| 
 Expansion Options 
 | 
||||||||
  | 
||||||||
Graphics
| This section is empty; you can help add the missing info by editing this page. | 
Features
[Edit/Modify Supported Features]
Facts about "Xeon E3-1205 v6  - Intel"
| Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.  | Xeon E3-1205 v6 - Intel#io + | 
| has advanced vector extensions | true + | 
| has advanced vector extensions 2 | true + | 
| has ecc memory support | true + | 
| has extended page tables support | true + | 
| has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Speed Shift Technology +, Trusted Execution Technology +, Intel vPro Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Transactional Synchronization Extensions +, Memory Protection Extensions +, Software Guard Extensions +, Secure Key Technology +, OS Guard +, Flex Memory Access +, Smart Response Technology +, My WiFi Technology + and Stable Image Platform Program + | 
| has intel enhanced speedstep technology | true + | 
| has intel flex memory access support | true + | 
| has intel my wifi technology support | true + | 
| has intel secure key technology | true + | 
| has intel smart response technology support | true + | 
| has intel speed shift technology | true + | 
| has intel stable image platform program support | true + | 
| has intel supervisor mode execution protection | true + | 
| has intel trusted execution technology | true + | 
| has intel turbo boost technology 2 0 | true + | 
| has intel vpro technology | true + | 
| has intel vt-d technology | true + | 
| has intel vt-x technology | true + | 
| has second level address translation support | true + | 
| has simultaneous multithreading | true + | 
| has transactional synchronization extensions | true + | 
| has x86 advanced encryption standard instruction set extension | true + | 
| l1$ size | 256 KiB (262,144 B, 0.25 MiB) + | 
| l1d$ description | 8-way set associative + | 
| l1d$ size | 128 KiB (131,072 B, 0.125 MiB) + | 
| l1i$ description | 8-way set associative + | 
| l1i$ size | 128 KiB (131,072 B, 0.125 MiB) + | 
| l2$ description | 4-way set associative + | 
| l2$ size | 1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) + | 
| l3$ description | 16-way set associative + | 
| l3$ size | 8 MiB (8,192 KiB, 8,388,608 B, 0.00781 GiB) + | 
| max memory bandwidth | 35.76 GiB/s (36,618.24 MiB/s, 38.397 GB/s, 38,397.008 MB/s, 0.0349 TiB/s, 0.0384 TB/s) + | 
| max memory channels | 2 + | 
| max pcie lanes | 16 + | 
| supported memory type | DDR3L-1600 +, LPDDR3-2133 + and DDR4-2400 + | 
| x86/has memory protection extensions | true + | 
| x86/has software guard extensions | true + |