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From WikiChip
CN5850-1000 NSP - Cavium
< cavium | octeon plus
Retrieved from "https://en.wikichip.org/w/index.php?title=cavium/octeon_plus/cn5850-1000bg1521-nsp&oldid=31832"
Facts about "CN5850-1000 NSP - Cavium"
has ecc memory support | true + |
l1$ size | 576 KiB (589,824 B, 0.563 MiB) + |
l1d$ description | 64-way set associative + |
l1d$ size | 192 KiB (196,608 B, 0.188 MiB) + |
l1i$ description | 64-way set associative + |
l1i$ size | 384 KiB (393,216 B, 0.375 MiB) + |
l2$ description | 8-way set associative + |
l2$ size | 2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) + |
max memory bandwidth | 11.92 GiB/s (12,206.08 MiB/s, 12.799 GB/s, 12,799.003 MB/s, 0.0116 TiB/s, 0.0128 TB/s) + |
max memory channels | 1 + |
supported memory type | DDR2-800 + |